Issued Patents All Time
Showing 51–75 of 225 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8441056 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2013-05-14 |
| 8415223 | Memory devices and methods of forming memory devices | Behnam Moradi, Seiichi Aritome, Di Li, Chris Larsen | 2013-04-09 |
| 8395140 | Cross-point memory utilizing Ru/Si diode | Nirmal Ramaswamy | 2013-03-12 |
| 8369150 | Relaxed metal pitch memory architectures | Lyle Jones, Roger W. Lindsay | 2013-02-05 |
| 8351242 | Electronic devices, memory devices and memory arrays | D. V. Nirmal Ramaswamy | 2013-01-08 |
| 8330139 | Multi-level memory cell | Durai Vishak Nirmal Ramaswamy | 2012-12-11 |
| 8268692 | Non-volatile memory cell devices and methods | Gurtej S. Sandhu | 2012-09-18 |
| 8129781 | Method of forming memory devices by performing halogen ion implantation and diffusion processes | Behnam Moradi, Seiichi Aritome, Di Li, Chris Larsen | 2012-03-06 |
| 8102714 | Programming methods for multi-level memory devices | Chun Chen | 2012-01-24 |
| 8063436 | Memory cells configured to allow for erasure by enhanced F-N tunneling of holes from a control gate to a charge trapping material | Arup Bhattacharyya, Luan C. Tran | 2011-11-22 |
| 7956402 | Double-doped polysilicon floating gate | Chun-Ming Chen | 2011-06-07 |
| 7955935 | Non-volatile memory cell devices and methods | Gurtej S. Sandhu | 2011-06-07 |
| 7911837 | Multi-state memory cell with asymmetric charge trapping | — | 2011-03-22 |
| 7897470 | Non-volatile memory cell device and methods | Gurtej S. Sandhu | 2011-03-01 |
| 7881113 | Relaxed metal pitch memory architectures | Lyle Jones, Roger W. Lindsay | 2011-02-01 |
| 7879665 | Structure and method of fabricating a transistor having a trench gate | Michael A. Smith, Mark A. Helm | 2011-02-01 |
| 7824994 | Method of forming memory devices by performing halogen ion implantation and diffusion processes | Behnam Moradi, Seiichi Aritome, Di Li, Chris Larsen | 2010-11-02 |
| 7776744 | Pitch multiplication spacers and methods of forming the same | Gurtej S. Sandhu | 2010-08-17 |
| 7750389 | NROM memory cell, memory array, related devices and methods | Leonard Forbes | 2010-07-06 |
| 7749848 | Band-engineered multi-gated non-volatile memory device with enhanced attributes | Arup Bhattacharyya, Luan C. Tran | 2010-07-06 |
| 7745283 | Method of fabricating memory transistor | — | 2010-06-29 |
| 7696557 | Contactless uniform-tunneling separate p-well (CUSP) non-volatile memory array architecture, fabrication and operation | Chun-Ming Chen, Andrei Mihnea | 2010-04-13 |
| 7684249 | Programming methods for multi-level memory devices | Chun Chen | 2010-03-23 |
| 7651911 | Memory transistor and methods | — | 2010-01-26 |
| 7616482 | Multi-state memory cell with asymmetric charge trapping | — | 2009-11-10 |