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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
JG

Jaydip Guha — 24 Patents

Micron: 22 patents #834 of 6,374Top 15%
NTNanya Technology: 2 patents #292 of 775Top 40%
Boise, ID: #423 of 3,546 inventorsTop 15%
Idaho: #592 of 8,810 inventorsTop 7%
Overall (All Time): #168,038 of 4,157,543Top 5%
24 Patents All Time
Jaydip Guha has been granted 24 US patents while listed as an inventor at Micron. The first was granted in 2013 and the most recent in June 2025. Jaydip Guha ranks #168,038 of 4,157,543 US inventors in our database (top 4.0%). Patent records list Jaydip Guha in Boise, ID, US.

Patents per Year

Patents granted per year, 2013 to 2025Bar chart with a peak of 5 patents in 2014.peak 52013: 4 patents20132014: 5 patents20142015: 3 patents20152016: 3 patents20162018: 2 patents20182021: 1 patents20212022: 2 patents20222023: 1 patents20232024: 2 patents20242025: 1 patents2025

Issued Patents All Time

Showing 1–24 of 24 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
12336288 Array of vertical transistors and method used in forming an array of vertical transistors Yi Fang Lee, Lars Heineck, Kamal M. Karda, Si-Woo Lee, Terrence B. McDaniel +3 more 2025-06-17
12178033 Memory device including calibration operation and transistor having adjustable threshold voltage Anthony J. Kanago, Srinivas Pulugurtha, Soichi Sugiura 2024-12-24 $36,268,000
11929411 Recessed access devices and methods of forming a recessed access devices Sau Ha Cheung, Soichi Sugiura, Anthony J. Kanago, Richard Beeler 2024-03-12 $21,460,000
11626488 Integrated assemblies and methods of forming integrated assemblies Srinivas Pulugurtha, Scott E. Sills, Yi Fang Lee 2023-04-11 $15,540,000
11488981 Array of vertical transistors and method used in forming an array of vertical transistors Yi Fang Lee, Lars Heineck, Kamal M. Karda, Si-Woo Lee, Terrence B. McDaniel +3 more 2022-11-01 $14,926,000
11335775 Integrated assemblies and methods of forming integrated assemblies Srinivas Pulugurtha, Scott E. Sills, Yi Fang Lee 2022-05-17 $11,540,000
11088147 Apparatus with doped surfaces, and related methods with in situ doping Saurabh Keshav, Srinivas Pulugurtha, Mohd Kamran Akhtar, James B. Franek, Alex J. Schrinsky 2021-08-10 $13,320,000
10147727 Conductive structures, wordlines and transistors Jaydeb Goswami, Zailong Bian, Yushi Hu, Eric Blomiley, Thomas Gehrke 2018-12-04 $13,328,000
9972628 Conductive structures, wordlines and transistors Jaydeb Goswami, Zailong Bian, Yushi Hu, Eric Blomiley, Thomas Gehrke 2018-05-15 $61,592,000
9337201 Memory cells, arrays of memory cells, and methods of forming memory cells Lars Heineck 2016-05-10 $5,444,000
9318493 Memory arrays, semiconductor constructions, and methods of forming semiconductor constructions Lars Heineck, Shyam Surthi 2016-04-19 $6,825,000
9230968 Methods of forming memory arrays and semiconductor constructions Shyam Surthi 2016-01-05 $5,653,000
9059030 Memory cells having capacitor dielectric directly against a transistor source/drain region Kamal M. Karda, Suraj Mathew 2015-06-16 $14,484,000
9054216 Methods of forming a vertical transistor Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai 2015-06-09 $11,836,000
8946018 Methods of forming memory arrays and semiconductor constructions Shyam Surthi 2015-02-03 $8,965,000
8916470 Method of manufacturing sidewall spacers on a memory device Durga P. Panda, Robert L. Kerr 2014-12-23
8890214 Method of manufacturing sidewall spacers on a memory device Panda Durga, Robert L. Kerr 2014-11-18
8871589 Methods of forming semiconductor constructions Lars Heineck, Shyam Surthi 2014-10-28 $12,316,000
8859367 Gate constructions of recessed access devices and methods of forming gate constructions of recessed access devices Suraj Mathew 2014-10-14 $8,705,000
8790977 Methods of forming a vertical transistor, methods of forming memory cells, and methods of forming arrays of memory cells Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai 2014-07-29 $15,214,000
8609488 Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai 2013-12-17 $5,079,000
8569831 Integrated circuit arrays and semiconductor constructions Lars Heineck, Shyam Surthi 2013-10-29 $5,369,000
8450175 Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai 2013-05-28 $4,107,000
8361856 Memory cells, arrays of memory cells, and methods of forming memory cells Lars Heineck 2013-01-29 $2,444,000