Issued Patents All Time
Showing 1–24 of 24 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336288 | Array of vertical transistors and method used in forming an array of vertical transistors | Yi Fang Lee, Lars Heineck, Kamal M. Karda, Si-Woo Lee, Terrence B. McDaniel +3 more | 2025-06-17 |
| 12178033 | Memory device including calibration operation and transistor having adjustable threshold voltage | Anthony J. Kanago, Srinivas Pulugurtha, Soichi Sugiura | 2024-12-24 |
| 11929411 | Recessed access devices and methods of forming a recessed access devices | Sau Ha Cheung, Soichi Sugiura, Anthony J. Kanago, Richard Beeler | 2024-03-12 |
| 11626488 | Integrated assemblies and methods of forming integrated assemblies | Srinivas Pulugurtha, Scott E. Sills, Yi Fang Lee | 2023-04-11 |
| 11488981 | Array of vertical transistors and method used in forming an array of vertical transistors | Yi Fang Lee, Lars Heineck, Kamal M. Karda, Si-Woo Lee, Terrence B. McDaniel +3 more | 2022-11-01 |
| 11335775 | Integrated assemblies and methods of forming integrated assemblies | Srinivas Pulugurtha, Scott E. Sills, Yi Fang Lee | 2022-05-17 |
| 11088147 | Apparatus with doped surfaces, and related methods with in situ doping | Saurabh Keshav, Srinivas Pulugurtha, Mohd Kamran Akhtar, James B. Franek, Alex J. Schrinsky | 2021-08-10 |
| 10147727 | Conductive structures, wordlines and transistors | Jaydeb Goswami, Zailong Bian, Yushi Hu, Eric Blomiley, Thomas Gehrke | 2018-12-04 |
| 9972628 | Conductive structures, wordlines and transistors | Jaydeb Goswami, Zailong Bian, Yushi Hu, Eric Blomiley, Thomas Gehrke | 2018-05-15 |
| 9337201 | Memory cells, arrays of memory cells, and methods of forming memory cells | Lars Heineck | 2016-05-10 |
| 9318493 | Memory arrays, semiconductor constructions, and methods of forming semiconductor constructions | Lars Heineck, Shyam Surthi | 2016-04-19 |
| 9230968 | Methods of forming memory arrays and semiconductor constructions | Shyam Surthi | 2016-01-05 |
| 9059030 | Memory cells having capacitor dielectric directly against a transistor source/drain region | Kamal M. Karda, Suraj Mathew | 2015-06-16 |
| 9054216 | Methods of forming a vertical transistor | Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai | 2015-06-09 |
| 8946018 | Methods of forming memory arrays and semiconductor constructions | Shyam Surthi | 2015-02-03 |
| 8916470 | Method of manufacturing sidewall spacers on a memory device | Durga P. Panda, Robert L. Kerr | 2014-12-23 |
| 8890214 | Method of manufacturing sidewall spacers on a memory device | Panda Durga, Robert L. Kerr | 2014-11-18 |
| 8871589 | Methods of forming semiconductor constructions | Lars Heineck, Shyam Surthi | 2014-10-28 |
| 8859367 | Gate constructions of recessed access devices and methods of forming gate constructions of recessed access devices | Suraj Mathew | 2014-10-14 |
| 8790977 | Methods of forming a vertical transistor, methods of forming memory cells, and methods of forming arrays of memory cells | Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai | 2014-07-29 |
| 8609488 | Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith | Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai | 2013-12-17 |
| 8569831 | Integrated circuit arrays and semiconductor constructions | Lars Heineck, Shyam Surthi | 2013-10-29 |
| 8450175 | Methods of forming a vertical transistor and at least a conductive line electrically coupled therewith | Shyam Surthi, Suraj Mathew, Kamal M. Karda, Hung-Ming Tsai | 2013-05-28 |
| 8361856 | Memory cells, arrays of memory cells, and methods of forming memory cells | Lars Heineck | 2013-01-29 |