Issued Patents All Time
Showing 25 most recent of 31 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12336288 | Array of vertical transistors and method used in forming an array of vertical transistors | Yi Fang Lee, Jaydip Guha, Lars Heineck, Kamal M. Karda, Si-Woo Lee +3 more | 2025-06-17 |
| 12069848 | Sense line and cell contact for semiconductor devices | Kuo-Chen Wang, Russell A. Benson, Vinay Nair | 2024-08-20 |
| 11915777 | Integrated assemblies and methods forming integrated assemblies | Che-Chi Lee, Kehao Zhang, Albert P. Chan, Clement Jacob, Luca Fumagalli +1 more | 2024-02-27 |
| 11785764 | Methods of forming microelectronic devices | Fatma Arzum Simsek-Ege, Kunal R. Parekh, Beau D. Barry | 2023-10-10 |
| 11488981 | Array of vertical transistors and method used in forming an array of vertical transistors | Yi Fang Lee, Jaydip Guha, Lars Heineck, Kamal M. Karda, Si-Woo Lee +3 more | 2022-11-01 |
| 11393908 | Methods of forming a microelectronic device, and related microelectronic devices, memory devices, and electronic systems | Sandeep Ramasamudra Suresha | 2022-07-19 |
| 11309315 | Digit line formation for horizontally oriented access devices | Si-Woo Lee, Vinay Nair, Luca Fumagalli | 2022-04-19 |
| 11282548 | Integrated assemblies and methods forming integrated assemblies | Che-Chi Lee, Kehao Zhang, Albert P. Chan, Clement Jacob, Luca Fumagalli +1 more | 2022-03-22 |
| 11257766 | Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems | Russell A. Benson, Davide Colombo, Yan Li, Vinay Nair, Silvia Borsari | 2022-02-22 |
| 8772163 | Semiconductor processing method and semiconductor structure | Dennis J. Pretti | 2014-07-08 |
| 8580666 | Methods of forming conductive contacts | Sandra Tagg, Fred Fishburn | 2013-11-12 |
| 8026542 | Low resistance peripheral local interconnect contacts with selective wet strip of titanium | Sandra Tagg, Fred Fishburn | 2011-09-27 |
| 7935997 | Low resistance peripheral contacts while maintaining DRAM array integrity | — | 2011-05-03 |
| 7902057 | Methods of fabricating dual fin structures | — | 2011-03-08 |
| 7883959 | Semiconductor processing methods | Mark Fischer | 2011-02-08 |
| 7821052 | Method for forming a buried digit line with self aligning spacing layer and contact plugs during the formation of a semiconductor device, semiconductor devices, and systems including same | James E. Green | 2010-10-26 |
| 7800137 | Semiconductor constructions | Mark Fischer | 2010-09-21 |
| 7605033 | Low resistance peripheral local interconnect contacts with selective wet strip of titanium | Sandra Tagg, Fred Fishburn | 2009-10-20 |
| 7557001 | Semiconductor processing methods | Mark Fischer | 2009-07-07 |
| 7517754 | Methods of forming semiconductor constructions | Scott A. Southwick, Fred Fishburn | 2009-04-14 |
| 7501672 | Method and structure for a self-aligned silicided word line and polysilicon plug during the formation of a semiconductor device | Fredrick Fishburn, Richard H. Lane | 2009-03-10 |
| 7491641 | Method of forming a conductive line and a method of forming a conductive contact adjacent to and insulated from a conductive line | Scott A. Southwick, Alex J. Schrinsky | 2009-02-17 |
| 7445996 | Low resistance peripheral contacts while maintaining DRAM array integrity | — | 2008-11-04 |
| 7364966 | Method for forming a buried digit line with self aligning spacing layer and contact plugs during the formation of a semiconductor device, semiconductor devices, and systems including same | James E. Green | 2008-04-29 |
| 7341909 | Methods of forming semiconductor constructions | Scott A. Southwick, Fred Fishburn | 2008-03-11 |