BJ

Brian Johnson

Micron: 69 patents #232 of 6,345Top 4%
PT Par Technology: 10 patents #1 of 37Top 3%
WR Weatherhaven Global Resources: 6 patents #1 of 5Top 20%
TI Texas Instruments: 5 patents #2,788 of 12,488Top 25%
AA Aluminum Company Of America: 4 patents #149 of 1,017Top 15%
3M: 3 patents #4,214 of 11,543Top 40%
SA Syngenta Participations Ag: 3 patents #318 of 1,106Top 30%
AT AT&T: 2 patents #7,280 of 18,772Top 40%
SO Sony: 2 patents #12,963 of 25,231Top 55%
RR Round Rock Research: 2 patents #110 of 239Top 50%
SL Sports Licensing: 1 patents #8 of 18Top 45%
BP Bae Systems Plc: 1 patents #384 of 927Top 45%
GE: 1 patents #19,878 of 36,430Top 55%
IP Innovative Properties: 1 patents #1 of 23Top 5%
EM Embrex: 1 patents #30 of 60Top 50%
Koniniklijke Philips N.V.: 1 patents #4,025 of 7,486Top 55%
MT Mircon Technology: 1 patents #1 of 36Top 3%
CC Commscope, Inc. Of North Carolina: 1 patents #136 of 253Top 55%
📍 Tucson, AZ: #12 of 6,004 inventorsTop 1%
🗺 Arizona: #44 of 32,909 inventorsTop 1%
Overall (All Time): #4,434 of 4,157,543Top 1%
176
Patents All Time

Issued Patents All Time

Showing 51–75 of 176 patents

Patent #TitleCo-InventorsDate
8305121 High-performance memory interface circuit architecture Joseph Huang, Chiakang Sung, Philip Pan, Yan Chong, Andy L. Lee 2012-11-06
8225033 Data storage system, electronic system, and telecommunications system 2012-07-17
8201129 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more 2012-06-12
8164965 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency Christopher Johnson 2012-04-24
8093453 Corn event 3272 and methods of detection thereof Tanya Markham, Vladimir Samoylov, Kenneth A. Dallmier 2012-01-10
8087433 Methods and apparatus for forming cable media Andy Setzer, Wayne C. Hopkinson, David Williams, Trent M. Hayes 2012-01-03
7994816 Multiple data rate memory interface architecture Andy L. Lee 2011-08-09
7969215 High-performance memory interface circuit architecture Joseph Huang, Chiakang Sung, Philip Pan, Yan Chong, Andy L. Lee 2011-06-28
7913035 Method and apparatus for address FIFO for high bandwidth command/address busses in digital storage system 2011-03-22
7826283 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency Christopher Johnson 2010-11-02
7800405 Passgate structures for use in low-voltage applications Andy L. Lee, Wanli Chang, Cameron McClintock, John E. Turner, Chiao Kai Hwang +2 more 2010-09-21
7746959 Method and system for generating reference voltages for signal receivers Brent Keeth, Joo S. Choi, George E. Pax, Ronnie M. Harrison, David K. Ovard +4 more 2010-06-29
7698499 Method and apparatus for address FIFO for high-bandwidth command/address busses in digital storage system 2010-04-13
7673254 Apparatus, system and method for context and language specific data entry Kevin Corbett, Dave Koste 2010-03-02
7635799 Corn event 3272 and methods for detection thereof Tanya Markham, Vladimir Samoylov, Ken Dallmier 2009-12-22
7584447 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Cameron McClintock, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more 2009-09-01
7577212 Method and system for generating reference voltages for signal receivers Brent Keeth, Joo S. Choi, George E. Pax, Ronnie M. Harrison, David K. Ovard +4 more 2009-08-18
7557608 Passgate structures for use in low-voltage applications Andy L. Lee, Wanli Chang, Cameron McClintock, John E. Turner, Chiao Kai Hwang +2 more 2009-07-07
7535275 High-performance memory interface circuit architecture Joseph Huang, Chiakang Sung, Philip Pan, Yan Chong, Andy L. Lee 2009-05-19
7504855 Multiple data rate memory interface architecture Andy L. Lee 2009-03-17
7457172 Memory device and method having data path with multiple prefetch I/O configurations Brent Keeth, Troy A. Manning 2008-11-25
7450447 Memory device and method having low-power, high write latency mode and high-power, low write latency mode and/or independently selectable write latency Christopher Johnson 2008-11-11
7436202 Method and apparatus for calibrating driver impedance Feng Lin 2008-10-14
7331617 Cabinet door lock 2008-02-19
7323903 Soft core control of dedicated memory interface hardware in a programmable logic device Andy L. Lee 2008-01-29