Issued Patents All Time
Showing 76–100 of 164 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6289495 | Method and apparatus for local optimization of the global routing | Pedja Raspopovic, Alexander E. Andreev | 2001-09-11 |
| 6269469 | Method and apparatus for parallel routing locking mechanism | Ivan Pavisic, Pedja Raspopovic | 2001-07-31 |
| 6260183 | Method and apparatus for coarse global routing | Pedja Raspopovic, Alexander E. Andreev | 2001-07-10 |
| 6253363 | Net routing using basis element decomposition | Elyar E. Gasanov, Pedja Raspopovic, Alexander E. Andreev | 2001-06-26 |
| 6247167 | Method and apparatus for parallel Steiner tree routing | Pedja Raspopovic, Alexander E. Andreev | 2001-06-12 |
| 6230306 | Method and apparatus for minimization of process defects while routing | Pedja Raspopovic, Alexander E. Andreev | 2001-05-08 |
| 6223332 | Advanced modular cell placement system with overlap remover with minimal noise | James S. Koford, Alexander E. Andreev | 2001-04-24 |
| 6197456 | Mask having an arbitrary complex transmission function | Stanislav V. Aleshin, Genadij V. Belokopitov | 2001-03-06 |
| 6186676 | Method and apparatus for determining wire routing | Alexander E. Andreev, Ivan Pavisic | 2001-02-13 |
| 6175953 | Method and apparatus for general systematic application of proximity correction | Dusan Petranovic, Edwin Jones, Richard Schinella, Nicholas F. Pasch, Mario Garza +3 more | 2001-01-16 |
| 6175950 | Method and apparatus for hierarchical global routing descend | Alexander E. Andreev, Elyar E. Gasanov, Pedja Raspopovic | 2001-01-16 |
| 6174630 | Method of proximity correction with relative segmentation | Dusan Petranovic, Edwin Jones, Richard Schinella, Nicholas F. Pasch, Mario Garza +3 more | 2001-01-16 |
| 6171731 | Hybrid aerial image simulation | Marina G. Medvedeva, Dusan Petranovic | 2001-01-09 |
| 6155725 | Cell placement representation and transposition for integrated circuit physical design automation system | James S. Koford, Edwin R. Jones, Douglas B. Boyle, Michael D. Rostoker | 2000-12-05 |
| 6154874 | Memory-saving method and apparatus for partitioning high fanout nets | Alexander E. Andreev, Pedja Raspopovic | 2000-11-28 |
| 6134702 | Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints | James S. Koford, Valeriy B. Kudryavtsev, Alexander E. Andreev, Stanislav V. Aleshin, Alexander S. Podkolzin | 2000-10-17 |
| 6123736 | Method and apparatus for horizontal congestion removal | Ivan Pavisic, Alexander E. Andreev | 2000-09-26 |
| 6109201 | Resynthesis method for significant delay reduction | Dusan Petranovic, Stanislav V. Aleshin, Mikhail I. Grinchuk, Sergei Gashov | 2000-08-29 |
| 6097073 | Triangular semiconductor or gate | Michael D. Rostoker, James S. Koford, Edwin R. Jones, Gobi R. Padmanahben, Ashok K. Kapoor +4 more | 2000-08-01 |
| 6085032 | Advanced modular cell placement system with sinusoidal optimization | James S. Koford, Alexander E. Andreev | 2000-07-04 |
| 6075933 | Method and apparatus for continuous column density optimization | Ivan Pavisic, Alexander E. Andreev | 2000-06-13 |
| 6068662 | Method and apparatus for congestion removal | Alexander E. Andreev, Ivan Pavisic | 2000-05-30 |
| 6070108 | Method and apparatus for congestion driven placement | Alexander E. Andreev, Ivan Pavisic | 2000-05-30 |
| 6067409 | Advanced modular cell placement system | Ivan Pavisic, James S. Koford, Alexander E. Andreev, Edwin R. Jones | 2000-05-23 |
| 6058254 | Method and apparatus for vertical congestion removal | Alexander E. Andreev, Ivan Pavisic | 2000-05-02 |