RS

Ranko Scepanovic

Lsi Logic: 134 patents #2 of 1,957Top 1%
LS Lsi: 25 patents #21 of 1,740Top 2%
EA Easic: 3 patents #9 of 43Top 25%
📍 San Jose, CA: #86 of 32,062 inventorsTop 1%
🗺 California: #830 of 386,348 inventorsTop 1%
Overall (All Time): #5,167 of 4,157,543Top 1%
164
Patents All Time

Issued Patents All Time

Showing 51–75 of 164 patents

Patent #TitleCo-InventorsDate
6804811 Process for layout of memory matrices in integrated circuits Alexander E. Andreev, Ivan Pavisic 2004-10-12
6795954 Method of decreasing instantaneous current without affecting timing Alexander E. Andreev 2004-09-21
6785699 Prefix comparator Alexander E. Andreev 2004-08-31
6760896 Process layout of buffer modules in integrated circuits Alexander E. Andreev, Ivan Pavisic 2004-07-06
6735600 Editing protocol for flexible search engines Alexander E. Andreev 2004-05-11
6704915 Process for fast cell placement in integrated circuit design Alexander E. Andreev, Mikhail I. Grinchuk 2004-03-09
6662287 Fast free memory address controller Alexander E. Andreev, Anatoli Bolotov 2003-12-09
6587990 Method and apparatus for formula area and delay minimization Alexander E. Andreev, Anatoli Bolotov 2003-07-01
6564211 Fast flexible search engine for longest prefix match Alexander E. Andreev 2003-05-13
6553370 Flexible search engine having sorted binary search tree for perfect match Alexander E. Andreev 2003-04-22
6536027 Cell pin extensions for integrated circuits Mikhail I. Grinchuk, Alexander E. Andreev 2003-03-18
6536016 Method and apparatus for locating constants in combinational circuits Alexander E. Andreev, Anatoli Bolotov 2003-03-18
6532585 Method and apparatus for application of proximity correction with relative segmentation Dusan Petranovic, Edwin Jones, Richard Schinella, Nicholas F. Pasch, Mario Garza +3 more 2003-03-11
6530063 Method and apparatus for detecting equivalent and anti-equivalent pins Alexander E. Andreev, Anatoli Bolotov 2003-03-04
6526553 Chip core size estimation Alexander E. Andreev, Ivan Pavisic 2003-02-25
6519746 Method and apparatus for minimization of net delay by optimal buffer insertion Alexander E. Andreev, Anatoli Bolotov 2003-02-11
6499003 Method and apparatus for application of proximity correction with unitary segmentation Edwin Jones, Dusan Petranovic, Richard Schinella, Nicholas F. Pasch, Mario Garza +3 more 2002-12-24
6493658 Optimization processing for integrated circuit physical design automation system using optimally switched fitness improvement algorithms James S. Koford, Michael D. Rostoker, Edwin R. Jones, Douglas B. Boyle 2002-12-10
6487698 Process, apparatus and program for transforming program language description of an IC to an RTL description Alexander E. Andreev 2002-11-26
6467067 &egr;-discrepant self-test technique Alexander E. Andreev, Lav D. Ivanovic 2002-10-15
6407434 Hexagonal architecture Michael D. Rostoker, James S. Koford, Edwin R. Jones, Gobi R. Padmanahben, Ashok K. Kapoor +4 more 2002-06-18
6324674 Method and apparatus for parallel simultaneous global and detail routing Alexander E. Andreev, Elyar E. Gasanov, Pedja Raspopovic 2001-11-27
6312980 Programmable triangular shaped device having variable gain Michael D. Rostoker, James S. Koford, Edwin R. Jones, Gobi R. Padmanahben, Ashok K. Kapoor +4 more 2001-11-06
6292924 Modifying timing graph to avoid given set of paths Ivan Pavisic, Anatoli Bolotov, Alexander E. Andreev 2001-09-18
6292929 Advanced modular cell placement system Ivan Pavisic, James S. Koford, Alexander E. Andreev, Edwin R. Jones 2001-09-18