QL

Qwai H. Low

Lsi Logic: 29 patents #21 of 1,957Top 2%
LS Lsi: 10 patents #118 of 1,740Top 7%
TE Tessera: 5 patents #92 of 271Top 35%
IN Invensas: 3 patents #76 of 142Top 55%
📍 Cupertino, CA: #295 of 6,989 inventorsTop 5%
🗺 California: #8,490 of 386,348 inventorsTop 3%
Overall (All Time): #57,992 of 4,157,543Top 2%
48
Patents All Time

Issued Patents All Time

Showing 26–48 of 48 patents

Patent #TitleCo-InventorsDate
6743979 Bonding pad isolation Michael Berman, Aftab Ahmad, Chok J. Chia, Ramaswamy Ranganathan 2004-06-01
6603200 Integrated circuit package Chok J. Chia, Seng-Sooi Lim 2003-08-05
6573113 Integrated circuit having dedicated probe pads for use in testing densely patterned bonding pads William T. Bright, Ramaswamy Ranganathan 2003-06-03
6489571 Molded tape ball grid array package Chok J. Chia, Patrick Variot 2002-12-03
6486002 Tape design to reduce warpage Ramaswamy Ranganathan, Sengsooi Lim 2002-11-26
6429534 Interposer tape for semiconductor package Chok J. Chia, Maniam Alagaratnam 2002-08-06
6425179 Method for assembling tape ball grid arrays Chok J. Chia, Ramaswamy Ranganathan 2002-07-30
6329278 Multiple row wire bonding with ball bonds of outer bond pads bonded on the leads Ramaswamy Ranganathan, Rey Torcuato 2001-12-11
6285077 Multiple layer tape ball grid array package Chok J. Chia, Seng-Sooi Lim 2001-09-04
6143586 Electrostatic protected substrate Chok J. Chia, Patrick Variot 2000-11-07
6114189 Molded array integrated circuit package Chok J. Chia, Seng-Sooi Lim 2000-09-05
6057594 High power dissipating tape ball grid array package Chok J. Chia, Maniam Alagaratnam 2000-05-02
6040632 Multiple sized die Chok J. Chia, Seng-Sooi Lim 2000-03-21
5973393 Apparatus and method for stackable molded lead frame ball grid array packaging of integrated circuits Chok J. Chia, Seng-Sooi Lim 1999-10-26
5973397 Semiconductor device and fabrication method which advantageously combine wire bonding and tab techniques to increase integrated circuit I/O pad density Chok J. Chia, Seng-Sooi Lim 1999-10-26
5923047 Semiconductor die having sacrificial bond pads for die test Chok J. Chia, Maniam Alagaratnam 1999-07-13
5886398 Molded laminate package with integral mold gate Manickam Thavarajah, Chok J. Chia, Maniam Alagaratnam 1999-03-23
5841191 Ball grid array package employing raised metal contact rings Chok J. Chia, Maniam Alagaratnam 1998-11-24
5814881 Stacked integrated chip package and method of making same Maniam Alagaratnam, Chok J. Chia 1998-09-29
5568683 Method of cooling a packaged electronic device Chok J. Chia, Manian Alagaratnam, Seng-Sooi Lim 1996-10-29
5463529 High power dissipating packages with matched heatspreader heatsink assemblies Chok J. Chia, Manian Alagaratnam, Seng-Sooi Lim 1995-10-31
5386144 Snap on heat sink attachment Patrick Variot, Maniam Alagaratnam, Teresa Dalao 1995-01-31
5353193 High power dissipating packages with matched heatspreader heatsink assemblies Chok J. Chia, Manian Alagaratnam, Seng-Sooi Lim 1994-10-04