CY

Colin D. Yates

Lsi Logic: 5 patents #372 of 1,957Top 20%
NA Nantero: 4 patents #29 of 73Top 40%
LS Lsi: 1 patents #914 of 1,740Top 55%
Overall (All Time): #516,403 of 4,157,543Top 15%
10
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8343373 Method of aligning nanotubes and wires with an etched feature 2013-01-01
7858979 Method of aligning deposited nanotubes onto an etched feature using a spacer Christopher Neville, Thomas Rueckes, Steven L. Konsek, Mitchell Meinhold, Claude L. Bertin 2010-12-28
7575693 Method of aligning nanotubes and wires with an etched feature Thomas Rueckes, Steven L. Konsek, Mitchell Meinhold, Claude L. Bertin 2009-08-18
7541216 Method of aligning deposited nanotubes onto an etched feature using a spacer Christopher Neville 2009-06-02
7313508 Process window compliant corrections of design layout Ebo Croffie, Nicholas K. Eib, Christopher Neville, Mario Garza, Neal Callan 2007-12-25
7016041 Reticle overlay correction James R. B. Elmer 2006-03-21
6809824 Alignment process for integrated circuit structures on semiconductor substrate using scatterometry measurements of latent images in spaced apart test fields on substrate Nicholas F. Pasch, Nicholas K. Eib 2004-10-26
6458508 Method of protecting acid-catalyzed photoresist from chip-generated basic contaminants Nicholas F. Pasch, Shumay X. Dou 2002-10-01
6425117 System and method for performing optical proximity correction on the interface between optical proximity corrected cells Nicholas F. Pasch, Nicholas K. Eib, Shumay X. Dou 2002-07-23
5863825 Alignment mark contrast enhancement Nicholas F. Pasch, Marilyn Hwan, Richard S. Osugi, Dawn M. Lee, Shumay X. Dou 1999-01-26