Issued Patents All Time
Showing 76–100 of 177 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6988252 | Universal gates for ICs and transformation of netlists for their implementation | Ranko Scepanovic | 2006-01-17 |
| 6941314 | User selectable editing protocol for fast flexible search engine | Ranko Scepanovic | 2005-09-06 |
| 6941533 | Clock tree synthesis with skew for memory devices | Igor Vikhliantsev, Ivan Pavisic | 2005-09-06 |
| 6941494 | Built-in test for multiple memory circuits | Igor Vikhliantsev, Lav D. Ivanovic | 2005-09-06 |
| 6934733 | Optimization of adder based circuit architecture | Sergej B. Gashkov, Aiguo Lu | 2005-08-23 |
| 6901573 | Method for evaluating logic functions by logic circuits having optimized number of and/or switches | Andrey Nikitin | 2005-05-31 |
| 6886088 | Memory that allows simultaneous read requests | Egor A. Andreev, Anatoli Bolotov, Ranko Scepanovic | 2005-04-26 |
| 6848094 | Netlist redundancy detection and global simplification | Igor Vikhliantsev | 2005-01-25 |
| 6842750 | Symbolic simulation driven netlist simplification | Ranko Scepanovic | 2005-01-11 |
| 6804811 | Process for layout of memory matrices in integrated circuits | Ivan Pavisic, Ranko Scepanovic | 2004-10-12 |
| 6795954 | Method of decreasing instantaneous current without affecting timing | Ranko Scepanovic | 2004-09-21 |
| 6785699 | Prefix comparator | Ranko Scepanovic | 2004-08-31 |
| 6760896 | Process layout of buffer modules in integrated circuits | Ivan Pavisic, Ranko Scepanovic | 2004-07-06 |
| 6735600 | Editing protocol for flexible search engines | Ranko Scepanovic | 2004-05-11 |
| 6704915 | Process for fast cell placement in integrated circuit design | Ranko Scepanovic, Mikhail I. Grinchuk | 2004-03-09 |
| 6691283 | Optimization of comparator architecture | Sergej B. Gashkov, Aiguo Lu | 2004-02-10 |
| 6665850 | Spanning tree method for K-dimensional space | Vojislav Vukovic | 2003-12-16 |
| 6662287 | Fast free memory address controller | Anatoli Bolotov, Ranko Scepanovic | 2003-12-09 |
| 6615397 | Optimal clock timing schedule for an integrated circuit | Egor A. Andreev, Ivan Pavisic | 2003-09-02 |
| 6587990 | Method and apparatus for formula area and delay minimization | Ranko Scepanovic, Anatoli Bolotov | 2003-07-01 |
| 6564211 | Fast flexible search engine for longest prefix match | Ranko Scepanovic | 2003-05-13 |
| 6553370 | Flexible search engine having sorted binary search tree for perfect match | Ranko Scepanovic | 2003-04-22 |
| 6536016 | Method and apparatus for locating constants in combinational circuits | Ranko Scepanovic, Anatoli Bolotov | 2003-03-18 |
| 6536027 | Cell pin extensions for integrated circuits | Mikhail I. Grinchuk, Ranko Scepanovic | 2003-03-18 |
| 6530063 | Method and apparatus for detecting equivalent and anti-equivalent pins | Ranko Scepanovic, Anatoli Bolotov | 2003-03-04 |