Issued Patents All Time
Showing 101–125 of 177 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6526553 | Chip core size estimation | Ranko Scepanovic, Ivan Pavisic | 2003-02-25 |
| 6519746 | Method and apparatus for minimization of net delay by optimal buffer insertion | Ranko Scepanovic, Anatoli Bolotov | 2003-02-11 |
| 6507939 | Net delay optimization with ramptime violation removal | Anatoli Bolotov, Igor Vikhliantsev | 2003-01-14 |
| 6505336 | Channel router with buffer insertion | Pedja Raspopovic, Anatoli Bolotov | 2003-01-07 |
| 6487698 | Process, apparatus and program for transforming program language description of an IC to an RTL description | Ranko Scepanovic | 2002-11-26 |
| 6467067 | &egr;-discrepant self-test technique | Ranko Scepanovic, Lav D. Ivanovic | 2002-10-15 |
| 6453453 | Process for solving assignment problems in integrated circuit designs with unimodal object penalty functions and linearly ordered set of boxes | Anatoli Bolotov, Pedja Raspopovic | 2002-09-17 |
| 6412102 | Wire routing optimization | Ivan Pavisic, Pedja Raspopovic | 2002-06-25 |
| 6407434 | Hexagonal architecture | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 2002-06-18 |
| 6324674 | Method and apparatus for parallel simultaneous global and detail routing | Elyar E. Gasanov, Ranko Scepanovic, Pedja Raspopovic | 2001-11-27 |
| 6312980 | Programmable triangular shaped device having variable gain | Michael D. Rostoker, James S. Koford, Ranko Scepanovic, Edwin R. Jones, Gobi R. Padmanahben +4 more | 2001-11-06 |
| 6292929 | Advanced modular cell placement system | Ranko Scepanovic, Ivan Pavisic, James S. Koford, Edwin R. Jones | 2001-09-18 |
| 6292924 | Modifying timing graph to avoid given set of paths | Ivan Pavisic, Anatoli Bolotov, Ranko Scepanovic | 2001-09-18 |
| 6289495 | Method and apparatus for local optimization of the global routing | Pedja Raspopovic, Ranko Scepanovic | 2001-09-11 |
| 6260183 | Method and apparatus for coarse global routing | Pedja Raspopovic, Ranko Scepanovic | 2001-07-10 |
| 6253363 | Net routing using basis element decomposition | Elyar E. Gasanov, Ranko Scepanovic, Pedja Raspopovic | 2001-06-26 |
| 6247167 | Method and apparatus for parallel Steiner tree routing | Pedja Raspopovic, Ranko Scepanovic | 2001-06-12 |
| 6230306 | Method and apparatus for minimization of process defects while routing | Pedja Raspopovic, Ranko Scepanovic | 2001-05-08 |
| 6223332 | Advanced modular cell placement system with overlap remover with minimal noise | Ranko Scepanovic, James S. Koford | 2001-04-24 |
| 6186676 | Method and apparatus for determining wire routing | Ivan Pavisic, Ranko Scepanovic | 2001-02-13 |
| 6182272 | Metal layer assignment | Ivan Pavisic, Pedja Raspopovic | 2001-01-30 |
| 6175950 | Method and apparatus for hierarchical global routing descend | Ranko Scepanovic, Elyar E. Gasanov, Pedja Raspopovic | 2001-01-16 |
| 6154874 | Memory-saving method and apparatus for partitioning high fanout nets | Ranko Scepanovic, Pedja Raspopovic | 2000-11-28 |
| 6134702 | Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints | Ranko Scepanovic, James S. Koford, Valeriy B. Kudryavtsev, Stanislav V. Aleshin, Alexander S. Podkolzin | 2000-10-17 |
| 6123736 | Method and apparatus for horizontal congestion removal | Ivan Pavisic, Ranko Scepanovic | 2000-09-26 |