Issued Patents All Time
Showing 25 most recent of 90 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12416663 | Embedded system to characterize BTI degradation effects in MOSFETs | Michele Quarantelli, Alberto Piadena, Christopher Hess, Larg Weiland, Sharad Saxena | 2025-09-16 |
| 11107804 | IC with test structures and e-beam pads embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +21 more | 2021-08-31 |
| 11081476 | IC with test structures and e-beam pads embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +21 more | 2021-08-03 |
| 11081477 | IC with test structures and e-beam pads embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +21 more | 2021-08-03 |
| 11075194 | IC with test structures and E-beam pads embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +21 more | 2021-07-27 |
| 11018126 | IC with test structures and e-beam pads embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +21 more | 2021-05-25 |
| 10978438 | IC with test structures and E-beam pads embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +21 more | 2021-04-13 |
| 10852337 | Test structures for measuring silicon thickness in fully depleted silicon-on-insulator technologies | Sharad Saxena, Yuan Yu, Mike Kyu Hyon Pak, Meindert Martin Lunenborg | 2020-12-01 |
| 10854522 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, corner short, and via open test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2020-12-01 |
| 10777472 | IC with test structures embedded within a contiguous standard cell area | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2020-09-15 |
| 10768222 | Method and apparatus for direct testing and characterization of a three dimensional semiconductor memory structure | — | 2020-09-08 |
| 10643735 | Passive array test structure for cross-point memory characterization | Christopher Hess, Rakesh Vallishayee, Meindert Martin Lunenborg, Hendrik Schneider, Yuan Yu +2 more | 2020-05-05 |
| 10593604 | Process for making semiconductor dies, chips, and wafers using in-line measurements obtained from DOEs of NCEM-enabled fill cells | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2020-03-17 |
| 10290552 | Methods for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-05-14 |
| 10269786 | Integrated circuit containing first and second DOEs of standard Cell Compatible, NCEM-enabled Fill Cells, with the first DOE including tip-to-side short configured fill cells, and the second DOE including corner short configured fill cells | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-04-23 |
| 10211112 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-19 |
| 10211111 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side sort, and corner short test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-19 |
| 10199284 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, tip-to-side short, and chamfer short test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199293 | Method for processing a semiconductor water using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one side-to-side short or leakage, and at least one chamfer short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-tip short, side to side short, and chamfer short test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199290 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-tip short or leakage, at least one tip-to-side short or leakage, and at least one side-to-side short or leakage, where such measurements are obtained from cells with respective tip-to-tip short, tip-to-side short, and side-to-side short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199289 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one chamfer short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective chamfer short, corner short, and via open test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199294 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of a least one side-to-side short or leakage, at least one via-chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from cells with respective side-to-side short, via-chamfer short, and corner short test areas, using a charged particle-beam inspector with beam deflection to account for motion of the stage | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199288 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one side-to-side short or leakage, at least one corner short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective side-to-side short, corner short, and via open test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199287 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one via open or resistance, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and via open test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |
| 10199286 | Method for processing a semiconductor wafer using non-contact electrical measurements indicative of at least one tip-to-side short or leakage, at least one chamfer short or leakage, and at least one corner short or leakage, where such measurements are obtained from non-contact pads associated with respective tip-to-side short, chamfer short, and corner short test areas | Stephen Lam, Dennis Ciplickas, Jeremy Cheng, Simone Comensoli, Indranil De +20 more | 2019-02-05 |