MR

Mamun Ur Rashid

IN Intel: 22 patents #1,785 of 30,777Top 6%
Oracle: 1 patents #8,282 of 14,854Top 60%
Overall (All Time): #185,853 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
8225016 Even and odd frame combination data path architecture 2012-07-17
7954001 Nibble de-skew method, apparatus, and system Aaron Martin, Hing Y. To, Joe Salmon 2011-05-31
7805627 Clock synchronization scheme for deskewing operations in a data interface Hing Y. To 2010-09-28
7684267 Method and apparatus for memory redundancy in a microprocessor Ioannis Orginos, Mark E. Steigerwald 2010-03-23
7668524 Clock deskewing method, apparatus, and system Hon-Mo Law, Aaron Martin 2010-02-23
7590789 Optimizing clock crossing and data path latency 2009-09-15
7555670 Clocking architecture using a bidirectional clock port Ravindran Mohanavelu, Aaron Martin, Dawson W. Kesling, Joe Salmon 2009-06-30
7439788 Receive clock deskewing method, apparatus, and system Hon-Mo Law, Aaron Martin 2008-10-21
7401246 Nibble de-skew method, apparatus, and system Aaron Martin, Hing Y. To, Joe Salmon 2008-07-15
7388795 Modular memory controller clocking architecture Hing Y. To 2008-06-17
7324403 Latency normalization by balancing early and late clocks Hing Y. To, Joe Salmon 2008-01-29
7230464 Closed-loop delay compensation for driver 2007-06-12
7109768 Closed-loop control of driver slew rate 2006-09-19
7061224 Test circuit for delay lock loops Akira Kakizawa, Mark A. Beiley 2006-06-13
6958634 Programmable direct interpolating delay locked loop 2005-10-25
5835927 Special test modes for a page buffer shared resource in a memory device Mickey L. Fandrich, Salim B. Fedel, Ranjeet Alexis 1998-11-10
5822256 Method and circuitry for usage of partially functional nonvolatile memory Mark E. Bauer, Steven Wells, David M. Brown, Johnny Javanifard, Sherif Sweha +7 more 1998-10-13
5802552 System and method for allocating and sharingpage buffers for a flash memory device Mickey L. Fandrich, Owen W. Jungroth, Richard J. Durante 1998-09-01
5623620 Special test modes for a page buffer shared resource in a memory device Mickey L. Fandrich, Salim B. Fedel, Ranjeet Alexis 1997-04-22
5586081 Synchronous address latching for memory arrays Duane R. Mills, Richard E. Fackenthal, Rod Rozman 1996-12-17
5523972 Method and apparatus for verifying the programming of multi-level flash EEPROM memory Mark E. Bauer, Chakravarthy Yarlagadda, Phillip M. L. Kwong, Albert Fazio 1996-06-04
5497355 Synchronous address latching for memory arrays Duane R. Mills, Richard E. Fackenthal, Rod Rozman 1996-03-05
5410544 External tester control for flash memory Jerry A. Kreifels, Rodney R. Rozman, Richard J. Durante 1995-04-25