Issued Patents All Time
Showing 26–50 of 114 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6504396 | Method for adjusting an output slew rate of a buffer | Joseph C. Sher | 2003-01-07 |
| 6472893 | Test socket and methods | Chris G. Martin | 2002-10-29 |
| 6469944 | Method of compensating for a defect within a semiconductor device | Kurt D. Beigel, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce +1 more | 2002-10-22 |
| 6452846 | Driver circuit for a voltage-pulling device | Kurt D. Beigel, Douglas J. Cutter, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +2 more | 2002-09-17 |
| 6444577 | Method of fabricating a semiconductor device having increased breakdown voltage | — | 2002-09-03 |
| 6445629 | Method of stressing a memory device | Kurt D. Beigel, Douglas J. Cutter, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +2 more | 2002-09-03 |
| 6442101 | Method and apparatus for reducing bleed currents within a DRAM array having row-to-column shorts | Brian M. Shirley | 2002-08-27 |
| 6434059 | Method and apparatus for reducing bleed currents within a DRAM array having row-to-column shorts | Brian M. Shirley | 2002-08-13 |
| 6418071 | Method of testing a memory cell | Kurt D. Beigel, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce +1 more | 2002-07-09 |
| 6365937 | Electrostatic discharge protection device having a graded junction | Stephen R. Porter, Stephen L. Casper, Kevin G. Duesman | 2002-04-02 |
| 6355508 | Method for forming electrostatic discharge protection device having a graded junction | Stephen R. Porter, Stephen L. Casper, Kevin G. Duesman | 2002-03-12 |
| 6356250 | Matrix addressable display with electrostatic discharge protection | David A. Cathey, Glen E. Hush, Craig M. Dunham, David Zimlich | 2002-03-12 |
| 6353564 | Method of testing a memory array | Kurt D. Beigel, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer, Jeffrey D. Bruce +1 more | 2002-03-05 |
| 6350634 | Semiconductor device having a built-in heat sink and process of manufacturing same | — | 2002-02-26 |
| 6340896 | Test socket and methods | Chris G. Martin | 2002-01-22 |
| 6335888 | Margin-range apparatus for a sense amp's voltage-pulling transistor | Kurt D. Beigel, Douglas J. Cutter, Gordon D. Roberts, James E. Miller, Daryl L. Habersetzer +2 more | 2002-01-01 |
| 6320781 | Apparatus for minimization of data line coupling in a semiconductor memory device | Wen Li | 2001-11-20 |
| 6316976 | Method and apparatus for improving the performance of digital delay locked loop circuits | James E. Miller, Aaron Schoenfeld, R. Jacob Baker | 2001-11-13 |
| 6310802 | Method and apparatus for reducing bleed currents within a DRAM array having row-to-column shorts | Brian M. Shirley | 2001-10-30 |
| 6303445 | Method of ESD protection scheme | — | 2001-10-16 |
| 6300788 | Buffer with adjustable slew rate and a method of providing an adjustable slew rate | Joseph C. Sher | 2001-10-09 |
| 6300668 | High resistance integrated circuit resistor | James E. Miller | 2001-10-09 |
| 6281109 | Advance metallization process | Trung T. Doan, Jeff Zhiqiang Wu | 2001-08-28 |
| 6274482 | Semiconductor processing methods of forming a contact opening | Zhiqiang Wu, Alan R. Reinberg | 2001-08-14 |
| 6266034 | Matrix addressable display with electrostatic discharge protection | David A. Cathey, Glen E. Hush, Craig M. Dunham, David Zimlich | 2001-07-24 |