| 9396077 |
Redundant location address mapper |
Emmanuel Sacristan |
2016-07-19 |
| 8792332 |
Implementing lane shuffle for fault-tolerant communication links |
Ryan Abel Heckendorf, John D. Irish, Ibrahim Abdel-Rahman Ouda |
2014-07-29 |
| 8643421 |
Implementing low power, single master-slave elastic buffer |
Anthony Gus Aipperspach, Morgan D. Davis, Matthew R. Ellavsky, Kent Harold Haselhorst, Mark G. Veldhuizen |
2014-02-04 |
| 8493842 |
Implementing exchange of failing lane information for fault-tolerant communication links |
Ryan Abel Heckendorf |
2013-07-23 |
| 8213428 |
Methods and apparatus for indexing memory of a network processor |
Gerald G. Fagerness, Brian M. McKevett, James Francis Mikos, Tolga Ozguner |
2012-07-03 |
| 8170024 |
Implementing pointer and stake model for frame alteration code in a network processor |
John D. Irish, Joseph Franklin Logan, Tolga Ozguner, Michael S. Siegel |
2012-05-01 |
| 7757006 |
Implementing conditional packet alterations based on transmit port |
John D. Irish, Tolga Ozguner, Andrew Henry Wottreng |
2010-07-13 |
| 7660908 |
Implementing virtual packet storage via packet work area |
Kent Harold Haselhorst, John D. Irish |
2010-02-09 |
| 7650555 |
Method and apparatus for characterizing components of a device under test using on-chip trace logic analyzer |
Resham Rajendra Kulkarni, To Dieu Liang, Sarah Sabra Pettengill |
2010-01-19 |
| 7617332 |
Method and apparatus for implementing packet command instructions for network processing |
Paul Allen Ganfield, Kent Harold Haselhorst, John D. Irish |
2009-11-10 |
| 7475161 |
Implementing conditional packet alterations based on transmit port |
John D. Irish, Tolga Ozguner, Andrew Henry Wottreng |
2009-01-06 |
| 7330478 |
Method, apparatus, and computer program product for implementing pointer and stake model for frame alteration code in a network processor |
John D. Irish, Joseph Franklin Logan, Tolga Ozguner, Michael S. Siegel |
2008-02-12 |
| 7248595 |
Method, apparatus, and computer program product for implementing packet ordering |
Paul Allen Ganfield, John D. Irish |
2007-07-24 |
| 7089387 |
Methods and apparatus for maintaining coherency in a multi-processor system |
Paul Allen Ganfield, John D. Irish |
2006-08-08 |
| 7058839 |
Cached-counter arrangement in which off-chip counters are updated from on-chip counters |
— |
2006-06-06 |
| 6996650 |
Method and apparatus for implementing multiple configurable sub-busses of a point-to-point bus |
Jean Calvignac, Marco C. Heddes, Christopher Jon Johnson, Joseph Franklin Logan, Tolga Ozguner |
2006-02-07 |
| 6910092 |
Chip to chip interface for interconnecting chips |
Jean Calvignac, Marco C. Heddes, Joseph Franklin Logan, Tolga Ozguner |
2005-06-21 |
| 6880026 |
Method and apparatus for implementing chip-to-chip interconnect bus initialization |
Christopher Jon Johnson, Tolga Ozguner |
2005-04-12 |
| 6260089 |
Method and apparatus for implementing connections with circuits |
— |
2001-07-10 |
