Issued Patents All Time
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9728273 | Embedded memory testing using back-to-back write/read operations | Naveen Purushotham | 2017-08-08 |
| 9618579 | Programmable circuits for correcting scan-test circuitry defects in integrated circuit designs | — | 2017-04-11 |
| 9530486 | Adaptive technique for adjusting signal development across bit lines for read operation robustness in memory circuits | — | 2016-12-27 |
| 8977917 | Highly secure and extensive scan testing of integrated circuits | Wei Han, Zheng Chen, Eric Lee, Jie Qin, Shankar Durgamahanthi +1 more | 2015-03-10 |
| 7511535 | Fine-grained power management of synchronous and asynchronous datapath circuits | Steven E. Strauss, Bingxiong Xu | 2009-03-31 |
| 7409659 | System and method for suppressing crosstalk glitch in digital circuits | Thaddeus John Gabara, Kevin R. Stiles, Bingxiong Xu | 2008-08-05 |
| 7047163 | Method and apparatus for applying fine-grained transforms during placement synthesis interaction | Wilm E. Donath, Prabhakar Kudva, Lakshmi N. Reddy, Leon Stok, Andrew J. Sullivan +1 more | 2006-05-16 |
| 6532578 | Method of configuring integrated circuits using greedy algorithm for partitioning of N points in P isothetic rectangles | Maharaj Mukherjee | 2003-03-11 |