Shankar Durgamahanthi

LS Lattice Semiconductor: 1 patents #317 of 544Top 60%

📍 San Jose, CA: #22,480 of 32,062 inventorsTop 75%

🗺 California: #247,236 of 386,348 inventorsTop 65%

Overall (All Time): #3,042,536 of 4,157,543Top 75%

Patents All Time

Issued Patents All Time

Showing 1–1 of 1 patents

Patent #	Title	Co-Inventors	Date
8977917	Highly secure and extensive scan testing of integrated circuits	Wei Han, Zheng Chen, Eric Lee, Jie Qin, Kanad Chakraborty +1 more	2015-03-10