| 9431286 |
Deep trench with self-aligned sinker |
Sameer Pendharkar, Binghua Hu, Abbas Ali, Henry Litzmann Edwards, Britton Robbins +1 more |
2016-08-30 |
| 6683380 |
Integrated circuit with bonding layer over active circuitry |
Taylor R. Efland, Donald C. Abbott, Walter Bucksch, Marco Corsi, Chi-Cheong Shen +5 more |
2004-01-27 |
| 6534364 |
Tunnel diode layout for an EEPROM cell for protecting the tunnel diode region |
Louis N. Hutter |
2003-03-18 |
| 6424005 |
LDMOS power device with oversized dwell |
Chin-Yu Tsai, Taylor R. Efland, Sameer Pendharkar, Jozef Mitros, Jeffrey P. Smith +1 more |
2002-07-23 |
| 6284617 |
Metalization outside protective overcoat for improved capacitors and inductors |
Louis N. Hutter, M. Ali Khatibzadeh, John Kenneth Arch |
2001-09-04 |
| 6284669 |
Power transistor with silicided gate and contacts |
Louis N. Hutter, Jeffrey P. Smith, Han-Tzong Yuan, Jau-Yuann Yang, Taylor R. Efland +3 more |
2001-09-04 |
| 6236101 |
Metallization outside protective overcoat for improved capacitors and inductors |
Louis N. Hutter, M. Ali Khatibzadeh, John Kenneth Arch |
2001-05-22 |
| 6153451 |
Transistor with increased operating voltage and method of fabrication |
Louis N. Hutter, Jeffrey P. Smith |
2000-11-28 |
| 6144100 |
Integrated circuit with bonding layer over active circuitry |
Chi-Cheong Shen, Donald C. Abbott, Walter Bucksch, Marco Corsi, Taylor R. Efland +4 more |
2000-11-07 |
| 6025231 |
Self aligned DMOS transistor and method of fabrication |
Louis N. Hutter, James Robert Todd |
2000-02-15 |
| 5825065 |
Low voltage DMOS transistor |
Marco Corsi, Louis N. Hutter |
1998-10-20 |
| 5719421 |
DMOS transistor with low on-resistance and method of fabrication |
Louis N. Hutter |
1998-02-17 |
| 5576233 |
Method for making an EEPROM with thermal oxide isolated floating gate |
Louis N. Hutter |
1996-11-19 |
| 5554873 |
Semiconductor device having polysilicon resistor with low temperature coefficient |
Louis N. Hutter |
1996-09-10 |
| 5489547 |
Method of fabricating semiconductor device having polysilicon resistor with low temperature coefficient |
Louis N. Hutter |
1996-02-06 |
| 5436179 |
Semiconductor process for manufacturing semiconductor devices with increased operating voltages |
Louis N. Hutter |
1995-07-25 |
| 5408125 |
Semiconductor process for manufacturing semiconductor device with increased operating voltages |
Louis N. Hutter |
1995-04-18 |
| 5330922 |
Semiconductor process for manufacturing semiconductor devices with increased operating voltages |
Louis N. Hutter |
1994-07-19 |
| 5317180 |
Vertical DMOS transistor built in an n-well MOS-based BiCMOS process |
Louis N. Hutter |
1994-05-31 |
| 5171699 |
Vertical DMOS transistor structure built in an N-well CMOS-based BiCMOS process and method of fabrication |
Louis N. Hutter |
1992-12-15 |
| 4994887 |
High voltage merged bipolar/CMOS technology |
Louis N. Hutter, Mark Edward Gibson, Jeffrey P. Smith, Shiu-Hang Yan, Arnold C. Conway +4 more |
1991-02-19 |
| 4805071 |
High voltage capacitor for integrated circuits |
Louis N. Hutter |
1989-02-14 |