JA

John M. Aitken

IBM: 22 patents #4,909 of 70,183Top 7%
Overall (All Time): #182,835 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
11485992 Screening and culture method Kevin Andrew Taylor 2022-11-01
8035200 Neutralization of trapped charge in a charge accumulation layer of a semiconductor structure Ethan H. Cannon, Alvin W. Strong 2011-10-11
7943482 Method for semiconductor device having radiation hardened insulators and design structure thereof Ethan H. Cannon 2011-05-17
7935609 Method for fabricating semiconductor device having radiation hardened insulators Ethan H. Cannon 2011-05-03
7880158 Phase-change TaN resistor based triple-state/multi-state read only memory Fen Chen, Kai D. Feng 2011-02-01
7791169 Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors Ethan H. Cannon, Philip J. Oldiges, Alvin W. Strong 2010-09-07
7736915 Method for neutralizing trapped charge in a charge accumulation layer of a semiconductor structure Ethan H. Cannon, Alvin W. Strong 2010-06-15
7715248 Phase-change TaN resistor based triple-state/multi-state read only memory Fen Chen, Kai D. Feng 2010-05-11
7601602 Trench type buried on-chip precision programmable resistor Fen Chen, Timothy D. Sullivan 2009-10-13
7388274 Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors Ethan H. Cannon, Philip J. Oldiges, Alvin W. Strong 2008-06-17
7381981 Phase-change TaN resistor based triple-state/multi-state read only memory Fen Chen, Kai D. Feng 2008-06-03
7315075 Capacitor below the buried oxide of SOI CMOS technologies for protection against soft errors Ethan H. Cannon, Philip J. Oldiges, Alvin W. Strong 2008-01-01
7084483 Trench type buried on-chip precision programmable resistor Fen Chen, Timothy D. Sullivan 2006-08-01
7064414 Heater for annealing trapped charge in a semiconductor device Ethan H. Cannon, Philip J. Oldiges, Alvin W. Strong 2006-06-20
6352902 Process of forming a capacitor on a substrate Alvin W. Strong 2002-03-05
6333239 Processes for reduced topography capacitors Alvin W. Strong 2001-12-25
6252275 Silicon-on-insulator non-volatile random access memory device Steven W. Mittl, Alvin W. Strong 2001-06-26
6159787 Structures and processes for reduced topography trench capacitors Alvin W. Strong 2000-12-12
6088258 Structures for reduced topography capacitors Alvin W. Strong 2000-07-11
5530290 Large scale IC personalization method employing air dielectric structure for extended conductor Klaus D. Beyer, Billy L. Crowder, Stephen E. Greco 1996-06-25
5444015 Larce scale IC personalization method employing air dielectric structure for extended conductors Klaus D. Beyer, Billy L. Crowder, Stephen E. Greco 1995-08-22
5363550 Method of Fabricating a micro-coaxial wiring structure Shahzad Akbar, Billy L. Crowder, Asif Iqbal, Perwaiz Nihal 1994-11-15
5268324 Modified silicon CMOS process having selectively deposited Si/SiGe FETS Vijay P. Kesan, Seshadri Subbanna, Manu J. Tejwani, Subramanian S. Iyer 1993-12-07