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Temperature compensated PLL calibration |
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Programmable cell |
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Method and circuit for translating a differential signal to complementary CMOS levels |
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Configurable PCI clamp or high voltage tolerant I/O circuit |
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Control signal generator for an overvoltage-tolerant interface circuit on a low voltage process |
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Method, architecture and circuit for writing to and reading from a memory during a single cycle |
Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna, Satish C. Saripella |
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Method, architecture and circuit for writing to a memory |
Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna, Satish C. Saripella |
1999-11-16 |