Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9160580 | Adaptive equalizer utilizing eye diagram | Hanan Cohen | 2015-10-13 |
| 8847896 | Adaptive high dynamic range surface capacitive touchscreen controller | Mark E. Miller, George C. Sneed, Ramakrishna Y. Vadapalli | 2014-09-30 |
| 7525382 | Multi-level slew and swing control buffer | Hongming An, Howard Chang | 2009-04-28 |
| 7057418 | High speed linear half-rate phase detector | Wei Fu, Hongwen Lu, Joseph Balardeta | 2006-06-06 |
| 6720806 | Method and circuit for producing a reference frequency signal using a reference frequency doubler having frequency selection controls | Allen Carl Merrill, Joseph Balardeta | 2004-04-13 |
| 6630860 | Programmable phase locked-loop filter architecture for a range selectable bandwidth | Thomas Clark Bryan | 2003-10-07 |
| 6566967 | Configurable triple phase-locked loop circuit and method | Joseph Balardeta, Wei Fu, Paul Vanderbilt, Mehmet Mustafa Eker | 2003-05-20 |
| 6545524 | Configurable multiplexing circuit and method | Wei Fu, Joseph Balardeta, Paul Vanderbilt, Allen Carl Merrill | 2003-04-08 |
| 6122203 | Method, architecture and circuit for writing to and reading from a memory during a single cycle | Jeffery Scott Hunt, Ajay Srikrishna, Jeffrey W. Waldrip, Satish C. Saripella | 2000-09-19 |
| 6041388 | Circuit and method for controlling memory depth | Ping Wu | 2000-03-21 |
| 6016277 | Reference voltage generator for reading a ROM cell in an integrated RAM/ROM memory device | George M. Ansel, Jeffery Scott Hunt, Satish C. Saripella, Ajay Srikrishna | 2000-01-18 |
| 5986970 | Method, architecture and circuit for writing to a memory | Jeffery Scott Hunt, Ajay Srikrishna, Jeffrey W. Waldrip, Satish C. Saripella | 1999-11-16 |
| 5978280 | Method, architecture and circuit for reducing and/or eliminating small signal voltage swing sensitivity | Satish C. Saripella, Jeffery Scott Hunt, Ajay Srikrishna | 1999-11-02 |
| 5880999 | Read only/random access memory architecture and methods for operating same | George M. Ansel, Jeffery Scott Hunt, Satish C. Saripella, Ajay Srikrishna | 1999-03-09 |
| 5864509 | Method and apparatus for reducing continuous write cycle current in memory device | — | 1999-01-26 |