Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6784700 | Input buffer circuit | Jeffrey Scott Hunt | 2004-08-31 |
| 6445211 | Circuit technique for improved current matching in charge pump PLLS | — | 2002-09-03 |
| 6441593 | Low noise switching regulator | — | 2002-08-27 |
| 6373231 | Voltage regulator | Timothy M. Lacey | 2002-04-16 |
| 6249177 | Method, circuit and/or architecture for reducing gate oxide stress in low-voltage regulated devices | Derrick J. Savage | 2001-06-19 |
| 6122203 | Method, architecture and circuit for writing to and reading from a memory during a single cycle | Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna, Jeffrey W. Waldrip | 2000-09-19 |
| 6087858 | Self-timed sense amplifier evaluation scheme | Jeffery Scott Hunt | 2000-07-11 |
| 6016277 | Reference voltage generator for reading a ROM cell in an integrated RAM/ROM memory device | George M. Ansel, Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna | 2000-01-18 |
| 5986970 | Method, architecture and circuit for writing to a memory | Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna, Jeffrey W. Waldrip | 1999-11-16 |
| 5978280 | Method, architecture and circuit for reducing and/or eliminating small signal voltage swing sensitivity | Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna | 1999-11-02 |
| 5946255 | Wordline synchronized reference voltage generator | Jeffery Scott Hunt | 1999-08-31 |
| 5936894 | Dual level wordline clamp for reduced memory cell current | Andrew L. Hawkins, Jeffery Scott Hunt, Sanjay Sunder | 1999-08-10 |
| 5880999 | Read only/random access memory architecture and methods for operating same | George M. Ansel, Jeffery Scott Hunt, Sudhaker Reddy Anumula, Ajay Srikrishna | 1999-03-09 |
| 5864507 | Dual level wordline clamp for reduced memory cell current | Andrew L. Hawkins, Jeffery Scott Hunt, Sanjay Sunder | 1999-01-26 |
| 5821799 | Low voltage level shifting circuit and low voltage sense amplifier | — | 1998-10-13 |
| 5793682 | Circuit and method for disabling a bitline load | Jeffery Scott Hunt | 1998-08-11 |
| 5748021 | Sense amplifier design with dynamic recovery | Jeffery Scott Hunt | 1998-05-05 |
| 5737274 | Sense amplifier design | Jeffery Scott Hunt | 1998-04-07 |
| 5666310 | High-speed sense amplifier having variable current level trip point | Donald Y. Yu, Jeffrey Scott Hunt, William R. Hiltpold | 1997-09-09 |