Issued Patents All Time
Showing 1–25 of 35 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12419096 | Transistor device and method of manufacturing | Ralf Siemieniec, Till Schloesser, Hans-Joachim Schulze, Olaf Storbeck | 2025-09-16 |
| 12176172 | Power relay circuit | Christian Fachmann | 2024-12-24 |
| 12107130 | Semiconductor device having semiconductor device elements in a semiconductor layer | Johannes Baumgartl, Oliver Hellmund, Jacob Tillmann Ludwig, Iris Moder, Thomas Neidhart +2 more | 2024-10-01 |
| 12034040 | Superjunction transistor device and method for forming a superjunction transistor device | Hans Weber, Daniel Tutuc | 2024-07-09 |
| 11929395 | Superjunction transistor device | Hans Weber, Maximilian Treiber, Daniel Tutuc | 2024-03-12 |
| 11894445 | Method for producing a superjunction device | Daniel Tutuc, Matthias Kuenle, Hans Weber | 2024-02-06 |
| 11810779 | Method of porosifying part of a semiconductor wafer | Sophia Friedler, Bernhard Goller, Iris Moder | 2023-11-07 |
| 11652138 | Method for producing a superjunction device | Felix Schubert, Daniel Tutuc, Hans Weber | 2023-05-16 |
| 11552048 | Semiconductor device including an electrical contact with a metal layer arranged thereon | Oliver Hellmund, Barbara Eichinger, Thorsten Meyer | 2023-01-10 |
| 11404262 | Method for partially removing a semiconductor wafer | Sophia Friedler, Bernhard Goller, Iris Moder | 2022-08-02 |
| 11348838 | Method for forming a superjunction transistor device | Hans Weber, Daniel Tutuc | 2022-05-31 |
| 11328955 | Semiconductor chip including back-side conductive layer | Bernhard Goller | 2022-05-10 |
| 11189690 | Method for forming a superjunction transistor device | Hans Weber, Maximilian Treiber, Daniel Tutuc | 2021-11-30 |
| 11139125 | Power relay circuit | Christian Fachmann | 2021-10-05 |
| 11038028 | Semiconductor device and manufacturing method | Johannes Baumgartl, Oliver Hellmund, Jacob Tillmann Ludwig, Iris Moder, Thomas Neidhart +2 more | 2021-06-15 |
| 11011409 | Devices with backside metal structures and methods of formation thereof | Oliver Hellmund, Johannes Baumgartl, Iris Moder, Thomas Neidhart, Hans-Joachim Schulze | 2021-05-18 |
| 10802404 | Reticle and exposure method including projection of a reticle pattern into neighboring exposure fields | Joerg Ortner, Iris Moder | 2020-10-13 |
| 10784161 | Semiconductor chip including self-aligned, back-side conductive layer and method for making the same | Bernhard Goller | 2020-09-22 |
| 10714377 | Semiconductor device and semiconductor wafer including a porous layer and method of manufacturing | Bernhard Goller, Iris Moder, Hans-Joachim Schulze | 2020-07-14 |
| 10535553 | Devices with backside metal structures and methods of formation thereof | Oliver Hellmund, Johannes Baumgartl, Iris Moder, Thomas Neidhart, Hans-Joachim Schulze | 2020-01-14 |
| 10497583 | Method for manufacturing a semiconductor device comprising etching a semiconductor material | Iris Moder, Sophia Friedler, Hans-Joachim Schulze | 2019-12-03 |
| 10373839 | Wafer contacting device, and arrangement and method for electrochemical etching of a wafer | Friedrich Kroener | 2019-08-06 |
| 10325804 | Method of wafer thinning and realizing backside metal structures | Oliver Hellmund, Johannes Baumgartl, Iris Moder, Thomas Neidhart, Hans-Joachim Schulze | 2019-06-18 |
| 10199372 | Monolithically integrated chip including active electrical components and passive electrical components with chip edge stabilization structures | Iris Moder, Oliver Hellmund, Johannes Baumgartl, Annette Saenger, Barbara Eichinger +2 more | 2019-02-05 |
| 10199255 | Method for providing a planarizable workpiece support, a workpiece planarization arrangement, and a chuck | Alexander Binter, Bernhard Goller, Christian Grindling | 2019-02-05 |