Issued Patents All Time
Showing 1–16 of 16 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9075614 | Managing power consumption in a multi-core processor | Reid James Riedlinger, Don Soltis, William J. Bowhill, Satish Shrimali, Krishnakanth V. Sistla +5 more | 2015-07-07 |
| 9069555 | Managing power consumption in a multi-core processor | Reid J. Reidlinger, Don Soltis, William J. Bowhill, Satish Shrimali, Krishnakanth V. Sistla +5 more | 2015-06-30 |
| 7394301 | System and method for dynamically varying a clock signal | Samuel D. Naffziger, Benjamin J. Patella | 2008-07-01 |
| 7199611 | System to temporarily modify an output waveform | Samuel D. Naffziger | 2007-04-03 |
| 7200821 | Receiver and method for mitigating temporary logic transitions | Lei Wang | 2007-04-03 |
| 7123104 | System and method for measuring current | Christopher J. Bostak, Samuel D. Naffziger, Christopher Allan Poirier | 2006-10-17 |
| 6944751 | Register renaming to reduce bypass and increase apparent physical register size | Donald Soltis, Stephen R. Undy | 2005-09-13 |
| 6927605 | System and method for dynamically varying a clock signal | Samuel D. Naffziger, Benjamin J. Patella | 2005-08-09 |
| 6895497 | Multidispatch CPU integrated circuit having virtualized and modular resources and adjustable dispatch priority | Wayne Kever, Eric Delano | 2005-05-17 |
| 6841985 | Method and circuit for measuring on-chip, cycle-to-cycle clock jitter | — | 2005-01-11 |
| 6707831 | Mechanism for data forwarding | Rohit Bhatia, Mark Gibson | 2004-03-16 |
| 6665227 | Method and apparatus for reducing average power in RAMs by dynamically changing the bias on PFETs contained in memory cells | — | 2003-12-16 |
| 6586971 | Adapting VLSI clocking to short term voltage transients | Samuel D. Naffziger | 2003-07-01 |
| 6515935 | Method and apparatus for reducing average power in memory arrays by switching a diode in or out of the ground path | — | 2003-02-04 |
| 6388489 | Large input function replaying dynamic entry latch with static and monotonic dual rail outputs | Gary J Benjamin | 2002-05-14 |
| 6359830 | Storage cell on integrated circuit responsive to plural frequency clocks | Samuel D. Naffziger, Preston J Renstrom | 2002-03-19 |