Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6851071 | Apparatus and method of repairing a processor array for a failure detected at runtime | Daniel James Henderson, Raymond Hicks, Alongkorn Kitamorn, David Otto Lewis, Thomas A. Liebsch | 2005-02-01 |
| 6789048 | Method, apparatus, and computer program product for deconfiguring a processor | Richard Louis Arndt, Douglas Marvin Benignus, Daniel James Henderson, Alongkorn Kitamorn | 2004-09-07 |
| 6675341 | Extended error correction for SEC-DED codes with package error detection ability | Chin-Long Chen | 2004-01-06 |
| 6636981 | Method and system for end-to-end problem determination and fault isolation for storage area networks | Barry Stanley Barnett | 2003-10-21 |
| 6516429 | Method and apparatus for run-time deconfiguration of a processor in a symmetrical multi-processing system | Alongkorn Kitamorn, Charles Andrew McLaughlin, John T. O'Quin, II | 2003-02-04 |
| 6332181 | Recovery mechanism for L1 data cache parity errors | Kevin Arthur Chiarot, Namratha Jaisimha, Avijit Saha | 2001-12-18 |
| 6243823 | Method and system for boot-time deconfiguration of a memory in a processing system | Alongkorn Kitamorn, Charles Andrew McLaughlin | 2001-06-05 |
| 6233680 | Method and system for boot-time deconfiguration of a processor in a symmetrical multi-processing system | Alongkorn Kitamorn, Charles Andrew McLaughlin | 2001-05-15 |
| 6223299 | Enhanced error handling for I/O load/store operations to a PCI device via bad parity or zero byte enables | Charles Andrew McLaughlin, Danny Marvin Neal, James O. Nicholson, Steven M. Thurber | 2001-04-24 |
| 6199171 | Time-lag duplexing techniques | Arun Chandra | 2001-03-06 |
| 6179207 | Method for writing single width bar codes on semiconductors wafers | Chin-Long Chen, Fredrick Hayes Dill, Douglas S. Goodman, Mu-Yue Hsiao, Paul Vincent McCann +2 more | 2001-01-30 |
| 6108753 | Cache error retry technique | Manratha Rajasekharaiah Jaisimha, Avijit Saha, Shih-Hsiung S. Tung | 2000-08-22 |
| 6058491 | Method and system for fault-handling to improve reliability of a data-processing system | Arun Chandra | 2000-05-02 |
| 5978936 | Run time error probe in a network computing environment | Arun Chandra, Nandakumar Nityananda Tendolkar | 1999-11-02 |
| 5956351 | Dual error correction code | Chin-Long Chen | 1999-09-21 |
| 5682394 | Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature | Robert M. Blake, Chin-Long Chen, John A. Fifield, Howard L. Kalter | 1997-10-28 |
| 5552591 | Presence/absence bar code | Chin-Long Chen, Frederick Dill, Douglas S. Goodman, Mu-Yue Hsiao, Paul Vincent McCann +2 more | 1996-09-03 |
| 5533036 | Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature | Robert M. Blake, Chin-Long Chen, John A. Fifield, Howard L. Kalter | 1996-07-02 |
| 5521709 | Continuous barcode marking system | Chin-Long Chen, Fuad E. Doany, Mu-Yue Hsiao, Ricky A. Rand, Ralf J. Terbruggen | 1996-05-28 |
| 5380998 | Single width bar code with end code providing bidirectionality | Chin-Long Chen, Mu-Yue Hsiao, James M. Mulligan | 1995-01-10 |
| 5228046 | Fault tolerant computer memory systems and components employing dual level error correction and detection with disablement feature | Robert M. Blake, Chin-Long Chen, John A. Fifield, Howard L. Kalter | 1993-07-13 |
| 5161163 | Method and apparatus for providing error correction to symbol level codes | Chin-Long Chen, Mu-Yue Hsiao | 1992-11-03 |
| 5058115 | Fault tolerant computer memory systems and components employing dual level error correction and detection with lock-up feature | Robert M. Blake, Chin-Long Chen, John A. Fifield, Howard L. Kalter, Tin-Chee Lo | 1991-10-15 |
| 4461001 | Deterministic permutation algorithm | Mu-Yue Hsiao | 1984-07-17 |
| 4319357 | Double error correction using single error correcting code | — | 1982-03-09 |