Issued Patents All Time
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8583844 | System and method for optimizing slave transaction ID width based on sparse connection in multilayer multilevel interconnect system-on-chip architecture | Sakthivel Komarasamy Pullagoundapatti, Srinivasa Rao Kothamasu, Venkat Rao Vallapaneni, Shrinivas Sureban | 2013-11-12 |
| 8365049 | Soft-error detection for electronic-circuit registers | Stephan Habel | 2013-01-29 |
| 8078926 | Test pin gating for dynamic optimization | Stefan G. Block, Herbert Johannes Preuthen, Farid Labib, Stephan Habel | 2011-12-13 |
| 7640396 | All purpose processor implementation to support different types of cache memory architectures | David Parker | 2009-12-29 |
| 7616517 | Config logic power saving method | Stephan Habel, Stefan G. Block, Herbert Johannes Preuthen | 2009-11-10 |
| 7451426 | Application specific configurable logic IP | — | 2008-11-11 |
| 7392344 | Data-processing system and method for supporting varying sizes of cache memory | David Parker | 2008-06-24 |
| 7117472 | Placement of a clock signal supply network during design of integrated circuits | Stefan Auracher, Andreas Hils, Juergen Dirks, Manisha R. Patel, James Imper | 2006-10-03 |
| 7032190 | Integrated circuits, and design and manufacture thereof | Stefan Auracher, Andreas Hils | 2006-04-18 |