Issued Patents All Time
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11450753 | Edge cell signal line antenna diodes | Stefan G. Block, Ulrich Hensel | 2022-09-20 |
| 11329129 | Transistor cell for integrated circuits and method to form same | Stefan G. Block, Farid Labib | 2022-05-10 |
| 10505545 | Simplified bias scheme for digital designs | Stefan G. Block, Jurgen Dirks, Ulrich Hensel | 2019-12-10 |
| 10114919 | Placing and routing method for implementing back bias in FDSOI | Stefan G. Block, Ulrich Hensel, Christian Haufe, Fulvio Pugliese | 2018-10-30 |
| 8584068 | Timing violation debugging inside place and route tool | Matthias Dinter, Juergen Dirks | 2013-11-12 |
| 8564337 | Clock tree insertion delay independent interface | Stefan G. Block, Juergen Dirks | 2013-10-22 |
| 8078926 | Test pin gating for dynamic optimization | Stefan G. Block, Farid Labib, Stephan Habel, Claus Pribbernow | 2011-12-13 |
| 7747975 | Timing violation debugging inside place and route tool | Matthias Dinter, Juergen Dirks | 2010-06-29 |
| 7616517 | Config logic power saving method | Stephan Habel, Claus Pribbernow, Stefan G. Block | 2009-11-10 |
| 7398489 | Advanced standard cell power connection | Matthias Dinter, Juergen Dirks | 2008-07-08 |
| 7334207 | Automatic placement based ESD protection insertion | Johann Leyrer, Hermann Sauter | 2008-02-19 |
| 7331028 | Engineering change order scenario manager | Matthias Dinter, Juergen Dirks | 2008-02-12 |
| 7325215 | Timing violation debugging inside place and route tool | Matthias Dinter, Juergen Dirks | 2008-01-29 |