| 11450753 |
Edge cell signal line antenna diodes |
Herbert Johannes Preuthen, Ulrich Hensel |
2022-09-20 |
| 11329129 |
Transistor cell for integrated circuits and method to form same |
Farid Labib, Herbert Johannes Preuthen |
2022-05-10 |
| 10505545 |
Simplified bias scheme for digital designs |
Jurgen Dirks, Herbert Johannes Preuthen, Ulrich Hensel |
2019-12-10 |
| 10114919 |
Placing and routing method for implementing back bias in FDSOI |
Herbert Johannes Preuthen, Ulrich Hensel, Christian Haufe, Fulvio Pugliese |
2018-10-30 |
| 9773811 |
Reducing antenna effects in SOI devices |
Ingolf Lorenz, Ulrich Hensel, Jurgen Faul, Michael Zier, Haritez Narisetty |
2017-09-26 |
| 8564337 |
Clock tree insertion delay independent interface |
Herbert Johannes Preuthen, Juergen Dirks |
2013-10-22 |
| 8219959 |
Generating integrated circuit floorplan layouts |
Juergen Dirks, Norbert Mueller |
2012-07-10 |
| 8078926 |
Test pin gating for dynamic optimization |
Herbert Johannes Preuthen, Farid Labib, Stephan Habel, Claus Pribbernow |
2011-12-13 |
| 7944237 |
Adjustable hold flip flop and method for adjusting hold requirements |
Stephan Habel |
2011-05-17 |
| 7880498 |
Adjustable hold flip flop and method for adjusting hold requirements |
Stephan Habel |
2011-02-01 |
| 7829973 |
N cell height decoupling circuit |
Richard T. Schultz, Thomas R. O'Brien, Viswanathan Lakshmanan, David M. Ratchkov |
2010-11-09 |
| 7650548 |
Power saving flip-flop |
Stephan Habel |
2010-01-19 |
| 7616517 |
Config logic power saving method |
Stephan Habel, Claus Pribbernow, Herbert Johannes Preuthen |
2009-11-10 |
| 7514974 |
Method and apparatus for adjusting on-chip delay with power supply control |
Stephan Habel |
2009-04-07 |
| 7088158 |
Digital multi-phase clock generator |
David R. Reuveni |
2006-08-08 |
| 6904554 |
Logic built-in self test (BIST) |
David R. Rueveni |
2005-06-07 |
| 6756832 |
Digitally-programmable delay line for multi-phase clock generator |
David R. Reuveni |
2004-06-29 |
| 6667703 |
Matching calibration for digital-to-analog converters |
David R. Reuveni |
2003-12-23 |
| 6567022 |
Matching calibration for dual analog-to-digital converters |
David R. Reuveni |
2003-05-20 |
| 6313683 |
Method of providing clock signals to load circuits in an ASIC device |
Bernd Ahner, David R. Reuveni, Benjamin Mbouombouo |
2001-11-06 |
