Issued Patents All Time
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7117472 | Placement of a clock signal supply network during design of integrated circuits | Stefan Auracher, Claus Pribbernow, Andreas Hils, Juergen Dirks, Manisha R. Patel | 2006-10-03 |
JI
James Imper
Overall (All Time): #3,430,335 of 4,157,543Top 85%
1
Patents All Time