CM

Cameron McClintock

IN Intel: 75 patents #345 of 30,777Top 2%
Overall (All Time): #25,128 of 4,157,543Top 1%
76
Patents All Time

Issued Patents All Time

Showing 25 most recent of 76 patents

Patent #TitleCo-InventorsDate
9094014 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Christopher F. Lane +3 more 2015-07-28
8732646 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Christopher F. Lane +3 more 2014-05-20
8407649 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Christopher F. Lane +3 more 2013-03-26
8198914 Apparatus and methods for adjusting performance of programmable logic devices Andy L. Lee, Christopher F. Lane, Ketan Zaveri, Richard G. Cliff, Srinivas T. Reddy +1 more 2012-06-12
8201129 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more 2012-06-12
7936184 Apparatus and methods for adjusting performance of programmable logic devices Andy L. Lee, Christopher F. Lane, Ketan Zaveri, Richard G. Cliff, Srinivas T. Reddy +1 more 2011-05-03
7800405 Passgate structures for use in low-voltage applications Andy L. Lee, Wanli Chang, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more 2010-09-21
7584447 PLD architecture for flexible placement of IP function blocks Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more 2009-09-01
7557608 Passgate structures for use in low-voltage applications Andy L. Lee, Wanli Chang, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more 2009-07-07
7196542 Techniques for providing increased flexibility to input/output banks with respect to supply voltages Andy L. Lee, Toan Thanh Nguyen, Stephanie Tran, Brian Johnson 2007-03-27
7119574 Passage structures for use in low-voltage applications Andy L. Lee, Wanli Chang, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more 2006-10-10
7058920 Methods for designing PLD architectures for flexible placement of IP function blocks Andy L. Lee, Brian Johnson, Richard G. Cliff, Srinivas T. Reddy, Chris Lane +3 more 2006-06-06
7034570 I/O cell configuration for multiple I/O standards Richard G. Cliff, Bonnie I. Wang 2006-04-25
6970014 Routing architecture for a programmable logic device David Lewis, Paul Leventis, Andy L. Lee, Brian Johnson, Richard G. Cliff +5 more 2005-11-29
6897678 Programmable logic device with circuitry for observing programmable logic circuit signals and for preloading programmable logic circuits Ketan Zaveri, Christopher F. Lane, Srinivas T. Reddy, Andy L. Lee, Bruce B. Pedersen 2005-05-24
6895570 System and method for optimizing routing lines in a programmable logic device David Lewis, Vaughn Betz, Paul Leventis, Michael Chan, Andy L. Lee +3 more 2005-05-17
6879183 Programmable logic device architectures with super-regions having logic regions and a memory region David Jefferson, James Schleicher, Andy L. Lee, Manuel Mejia, Bruce B. Pedersen +3 more 2005-04-12
6859065 Use of dangling partial lines for interfacing in a PLD Brian Johnson, Andy L. Lee, Giles V. Powell, Paul Leventis 2005-02-22
6842040 Differential interconnection circuits in programmable logic devices Wanli Chang, Andy L. Lee, Richard G. Cliff, Richard Yen-Hsiang Chang 2005-01-11
6836151 I/O cell configuration for multiple I/O standards Richard G. Cliff, Bonnie I. Wang 2004-12-28
6826741 Flexible I/O routing resources Brian Johnson, Andy L. Lee, Triet Nguyen, David Jefferson, Paul Leventis +3 more 2004-11-30
RE38651 Variable depth and width memory device Chiakang Sung, Wanli Chang, Joseph Huang, Richard G. Cliff, L. Todd Cope +3 more 2004-11-09
6714050 I/O cell configuration for multiple I/O standards Richard G. Cliff, Bonnie I. Wang 2004-03-30
6661253 Passgate structures for use in low-voltage applications Andy L. Lee, Wanli Chang, John E. Turner, Brian Johnson, Chiao Kai Hwang +2 more 2003-12-09
6653862 Use of dangling partial lines for interfacing in a PLD Brian Johnson, Andy L. Lee, Giles V. Powell, Paul Leventis 2003-11-25