| 7541275 |
Method for manufacturing an interconnect |
Betty Mercer, Erika Leigh Shoemaker, Byron Lovell Williams, Laurinda Ng, C. Matthew Thompson |
2009-06-02 |
| 7471570 |
Embedded EEPROM array techniques for higher density |
Jozef Mitros |
2008-12-30 |
| 6680226 |
Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology |
Taylor R. Efland, Chin-Yu Tsai |
2004-01-20 |
| 6591409 |
Measuring integrated circuit layout efficiency |
Ganesh Kamath, Preetham Kumar |
2003-07-08 |
| 6548874 |
Higher voltage transistors for sub micron CMOS processes |
Taylor R. Efland, Chin-Yu Tsai, Jozef Mitros, Dan M. Mosher, Sam Shichijo +1 more |
2003-04-15 |
| 6468849 |
Methods and devices for optimized digital and analog CMOS transistor performance in deep submicron technology |
Taylor R. Efland, Chin-Yu Tsai |
2002-10-22 |
| 6413824 |
METHOD TO PARTIALLY OR COMPLETELY SUPPRESS POCKET IMPLANT IN SELECTIVE CIRCUIT ELEMENTS WITH NO ADDITIONAL MASK IN A CMOS FLOW WHERE SEPARATE MASKING STEPS ARE USED FOR THE DRAIN EXTENSION IMPLANTS FOR THE LOW VOLTAGE AND HIGH VOLTAGE TRANSISTORS |
Amitava Chatterjee, Mark S. Rodder, Taylor R. Efland, Chin-Yu Tsai, James R. Hellums |
2002-07-02 |
| 6303420 |
Integrated bipolar junction transistor for mixed signal circuits |
Seetharaman Sridhar, Amitava Chatterjee, Hisashi Shichijo |
2001-10-16 |
| 5801091 |
Method for current ballasting and busing over active device area using a multi-level conductor process |
Taylor R. Efland, Satwinder Malhi, Michael C. Smayling, Joseph A. Devore, Ross E. Teggatz |
1998-09-01 |
| 5665991 |
Device having current ballasting and busing over active area using a multi-level conductor process |
Taylor R. Efland, Satwinder Malhi, Michael C. Smayling, Joseph A. Devore, Ross E. Teggatz |
1997-09-09 |
| 4796216 |
Linear predictive coding technique with one multiplication step per stage |
Karl Renner |
1989-01-03 |
| 4740906 |
Digital lattice filter with multiplexed fast adder/full adder for performing sequential multiplication and addition operations |
Karl Renner |
1988-04-26 |
| 4700323 |
Digital lattice filter with multiplexed full adder |
Karl Renner |
1987-10-13 |
| 4695970 |
Linear predictive coding technique with interleaved sequence digital lattice filter |
Karl Renner |
1987-09-22 |
| 4686644 |
Linear predictive coding technique with symmetrical calculation of Y-and B-values |
Karl Renner |
1987-08-11 |