Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8354858 | Apparatus and method for hardening latches in SOI CMOS devices | Ethan H. Cannon, K. Paul Muller, Tak H. Ning, Philip J. Oldiges, Leon Sigal +2 more | 2013-01-15 |
| 8271912 | Radiation tolerance by clock signal interleaving | Matthew R. Ellavsky, Scott M. Willenborg | 2012-09-18 |
| 8211741 | Carbon nanotube based integrated semiconductor circuit | Joerg Appenzeller, Edward J. Nowak, Richard Q. Williams | 2012-07-03 |
| 8017934 | Carbon nanotube based integrated semiconductor circuit | Joerg Appenzeller, Edward J. Nowak, Richard Q. Williams | 2011-09-13 |
| 7888959 | Apparatus and method for hardening latches in SOI CMOS devices | Ethan H. Cannon, K. Paul Muller, Tak H. Ning, Philip J. Oldiges, Leon Sigal +2 more | 2011-02-15 |
| 7881135 | Method for QCRIT measurement in bulk CMOS using a switched capacitor circuit | Ethan H. Cannon, Alan J. Drake, Fadi H. Gebara, John P. Keane | 2011-02-01 |
| 7786466 | Carbon nanotube based integrated semiconductor circuit | Joerg Appenzeller, Edward J. Nowak, Richard Q. Williams | 2010-08-31 |
| 7774732 | Method for radiation tolerance by automated placement | Scott M. Willenborg, Bruce B. Winter | 2010-08-10 |
| 7734970 | Self-resetting, self-correcting latches | Alan J. Drake, Andrew K. Martin | 2010-06-08 |
| 7725870 | Method for radiation tolerance by implant well notching | Mark R. Beckenbaugh, Eric John Lukes | 2010-05-25 |
| 7698681 | Method for radiation tolerance by logic book folding | Mark R. Beckenbaugh, Eric John Lukes, Byron D. Scott | 2010-04-13 |
| 7590907 | Method and apparatus for soft-error immune and self-correcting latches | Alan J. Drake, Andrew K. Martin | 2009-09-15 |
| 7418641 | Self-resetting, self-correcting latches | Alan J. Drake, Andrew K. Martin | 2008-08-26 |
| 7202705 | Dynamic logic circuit apparatus and method for reducing leakage power consumption via separate clock and output stage control | Hung C. Ngo, Jente B. Kuang, Harmander Singh Deogun | 2007-04-10 |
| 7193446 | Dynamic logic circuit incorporating reduced leakage state-retaining devices | Hung C. Ngo, Jente B. Kuang, Harmander Singh Deogun | 2007-03-20 |