Issued Patents All Time
Showing 51–75 of 100 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7173803 | Low impedance inter-digital capacitor and method of using | Dong Zhong, Jiangqi He | 2007-02-06 |
| 7145239 | Circuit board with trace configuration for high-speed digital differential signaling | Jiangqi He, Dong Zhong, David G. Figueroa | 2006-12-05 |
| 7144756 | Structure and material for assembling a low-K Si die to achieve a low warpage and industrial grade reliability flip chip package with organic substrate | Wen-chou Vincent Wang, Donald S. Fritz | 2006-12-05 |
| 7136272 | Low parasitic inductance capacitor with central terminals | Jiangqi He, Dong Zhong | 2006-11-14 |
| 7133294 | Integrated circuit packages with sandwiched capacitors | Priyavadan R. Patel, Chee-Yee Chung, David G. Figueroa, Robert L. Sankman, Hong Xie +1 more | 2006-11-07 |
| 7111271 | Inductive filters and methods of fabrication thereof | David G. Figueroa | 2006-09-19 |
| 7063569 | Coaxial dual pin sockets for high speed I/O applications | David G. Figueroa | 2006-06-20 |
| 7009307 | Low stress and warpage laminate flip chip BGA package | — | 2006-03-07 |
| 6995465 | Silicon building block architecture with flex tape | Dong Zhong, Jiangqi He, Jung Kang | 2006-02-07 |
| 6992387 | Capacitor-related systems for addressing package/motherboard resonance | Jennifer A. Hester, Michael DeSmith, David G. Figueroa, Dong Zhong | 2006-01-31 |
| 6964584 | Low impedance, high-power socket and method of using | Dong Zhong, David G. Figueroa, Jiangqi He | 2005-11-15 |
| 6949404 | Flip chip package with warpage control | Don Fritz, Wen-chou Vincent Wang | 2005-09-27 |
| 6948943 | Shunting arrangements to reduce high currents in grid array connectors | — | 2005-09-27 |
| 6920051 | Hybrid capacitor, circuit, and system | David G. Figueroa, Huong Do | 2005-07-19 |
| 6914334 | Circuit board with trace configuration for high-speed digital differential signaling | Jiangqi He, Dong Zhong, David G. Figueroa | 2005-07-05 |
| 6909176 | Structure and material for assembling a low-K Si die to achieve a low warpage and industrial grade reliability flip chip package with organic substrate | Wen-chou Vincent Wang, Donald S. Fritz | 2005-06-21 |
| 6907658 | Manufacturing methods for an electronic assembly with vertically connected capacitors | — | 2005-06-21 |
| 6900991 | Electronic assembly with sandwiched capacitors and methods of manufacture | Priyavadan R. Patel, Chee-Yee Chung, David G. Figueroa, Robert L. Sankman, Hong Xie +1 more | 2005-05-31 |
| 6897556 | I/O architecture for integrated circuit package | Jianqi He, Michael Walk | 2005-05-24 |
| 6888238 | Low warpage flip chip package solution-channel heat spreader | — | 2005-05-03 |
| 6870257 | Power delivery through a flex tape in decoupled I/O-power hybrid substrate | Dong Zhong, Jianggi He, Jung Kang | 2005-03-22 |
| 6841842 | Method and apparatus for electrical-optical packaging with capacitive DC shunts | — | 2005-01-11 |
| 6815256 | Silicon building blocks in integrated circuit packaging | David G. Figueroa, Dong Zhong, Jiangqi He, Cengiz A. Palanduz | 2004-11-09 |
| 6811410 | Integrated circuit socket with capacitors and shunts | David G. Figueroa | 2004-11-02 |
| 6803649 | Electronic assembly | Jiangqi He, Jung Kang, Dong Zhong, John Tang | 2004-10-12 |