Issued Patents All Time
Showing 25 most recent of 34 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12375408 | Dynamic load balancing for multi-core computing environments | Stephen T. Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade +6 more | 2025-07-29 |
| 12309067 | Hardware queue scheduling for multi-core computing environments | Niall D. McDonnell, Gage Eads, Mrittika Ganguli, Chetan Hiremath, John Mangan +11 more | 2025-05-20 |
| 12289239 | Dynamic load balancing for multi-core computing environments | Stephen T. Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade +6 more | 2025-04-29 |
| 11709702 | Work conserving, load balancing, and scheduling | Joseph R. Hasting | 2023-07-25 |
| 11575607 | Dynamic load balancing for multi-core computing environments | Stephen T. Palermo, Bradley Chaddick, Gage Eads, Mrittika Ganguli, Abhishek Khade +6 more | 2023-02-07 |
| 11134021 | Techniques for processor queue management | Jonathan Kenny, Niall D. McDonnell, Andrew Cunningham, Debra Bernstein, Hugh Wilkinson | 2021-09-28 |
| 10929323 | Multi-core communication acceleration using hardware queue device | Ren Wang, Yipeng Wang, Andrew J. Herdrich, Jr-Shian Tsai, Tsung-Yuan C. Tai +20 more | 2021-02-23 |
| 10552205 | Work conserving, load balancing, and scheduling | Joseph R. Hasting | 2020-02-04 |
| 10445271 | Multi-core communication acceleration using hardware queue device | Ren Wang, Namakkal N. Venkatesan, Debra Bernstein, Edwin Verplanke, Stephen R. Van Doren +20 more | 2019-10-15 |
| 10437638 | Method and apparatus for dynamically balancing task processing while maintaining task order | Jerry Pirog, Joseph R. Hasting, Te K. Ma | 2019-10-08 |
| 10216668 | Technologies for a distributed hardware queue manager | Ren Wang, Yipeng Wang, Jr-Shian Tsai, Andrew J. Herdrich, Tsung-Yuan C. Tai +17 more | 2019-02-26 |
| 9864633 | Network processor having multicasting protocol | Deepak Mital, Joseph A. Manzella, Ritchie J. Peachey | 2018-01-09 |
| 9152564 | Early cache eviction in a multi-flow network processor architecture | Deepak Mital | 2015-10-06 |
| 9154442 | Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processors | Deepak Mital, Mohammad Reza Hakami | 2015-10-06 |
| 9094219 | Network processor having multicasting protocol | Deepak Mital, Joseph A. Manzella, Ritchie J. Peachey | 2015-07-28 |
| 9081742 | Network communications processor architecture | David P. Sonnier, Narender Vangati, Deepak Mital, Robert J. Munoz | 2015-07-14 |
| 8949838 | Multi-threaded processing with hardware accelerators | Deepak Mital, Eran Dosh, Eyal Rosin | 2015-02-03 |
| 8910168 | Task backpressure and deletion in a multi-flow network processor architecture | Deepak Mital, Michael R. Betker | 2014-12-09 |
| 8873550 | Task queuing in a multi-flow network processor architecture | Deepak Mital, Michael R. Betker, Joseph R. Hasting | 2014-10-28 |
| 8868889 | Instruction breakpoints in a multi-core, multi-thread network communications processor architecture | Deepak Mital, Te K. Ma, Narender Vangati | 2014-10-21 |
| 8677075 | Memory manager for a network communications processor architecture | Deepak Mital, David P. Sonnier, Steven J. Pollock, David A. Brown, Joseph R. Hasting | 2014-03-18 |
| 8537832 | Exception detection and thread rescheduling in a multi-core, multi-thread network processor | Jerry Pirog, Deepak Mital | 2013-09-17 |
| 8539199 | Hash processing in a network communications processor architecture | Deepak Mital, Mohammed Reza Hakami, Michael R. Betker | 2013-09-17 |
| 8515965 | Concurrent linked-list traversal for real-time hash processing in multi-core, multi-thread network processors | Deepak Mital, Mohammed Reza Hakami | 2013-08-20 |
| 8505013 | Reducing data read latency in a network communications processor architecture | Steven J. Pollock, Deepak Mital, Te K. Ma, Narender Vangati, Larry King | 2013-08-06 |