Issued Patents All Time
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8910168 | Task backpressure and deletion in a multi-flow network processor architecture | Deepak Mital, William Burroughs | 2014-12-09 |
| 8873550 | Task queuing in a multi-flow network processor architecture | Deepak Mital, William Burroughs, Joseph R. Hasting | 2014-10-28 |
| 8683221 | Configurable memory encryption with constant pipeline delay in a multi-core processor | Charles Edward Peet, Jr. | 2014-03-25 |
| 8539199 | Hash processing in a network communications processor architecture | William Burroughs, Deepak Mital, Mohammed Reza Hakami | 2013-09-17 |
| 8489794 | Processor bus bridge for network processors or the like | Richard J. Byrne | 2013-07-16 |
| 8489792 | Transaction performance monitoring in a processor bus bridge | Richard J. Byrne, David S. Masters, Steven J. Pollock | 2013-07-16 |
| 8255644 | Network communications processor architecture with memory load balancing | David P. Sonnier | 2012-08-28 |
| 8191067 | Method and apparatus for establishing a bound on the effect of task interference in a cache memory | Harry Dwyer, John Fernando | 2012-05-29 |
| 7353513 | Method and apparatus for establishing a bound on the effect of task interference in a cache memory | Harry Dwyer, John Fernando | 2008-04-01 |
| 7296259 | Processor system with cache-based software breakpoints | Bryan Schlieder, Shaun P. Whalen, Jay Patrick Wilshire | 2007-11-13 |
| 7168067 | Multiprocessor system with cache-based software breakpoints | Han Q. Nguyen, Bryan Schlieder, Shaun P. Whalen, Jay Patrick Wilshire | 2007-01-23 |
| 6092186 | Apparatus and method for aborting un-needed instruction fetches in a digital microprocessor device | Trevor Edward Little | 2000-07-18 |
| 6052766 | Pointer register indirectly addressing a second register in the processor core of a digital processor | John Fernando, Frank T. Lemmon, Shaun P. Whalen | 2000-04-18 |
| 5909557 | Integrated circuit with programmable bus configuration | Trevor Edward Little | 1999-06-01 |
| 5889981 | Apparatus and method for decoding instructions marked with breakpoint codes to select breakpoint action from plurality of breakpoint actions | Shaun P. Whalen | 1999-03-30 |
| 5724505 | Apparatus and method for real-time program monitoring via a serial interface | Pramod Vasant Argade, Shaun P. Whalen | 1998-03-03 |
| 5577230 | Apparatus and method for computer processing using an enhanced Harvard architecture utilizing dual memory buses and the arbitration for data/instruction fetch | Pramod Vasant Argade | 1996-11-19 |
| 4757422 | Dynamically balanced ionization blower | Peter R. Bossard, Robert H. Dunphy | 1988-07-12 |
| 4736157 | Wide-range resistance monitoring apparatus and method | Robert H. Dunphy | 1988-04-05 |