Issued Patents All Time
Showing 101–125 of 129 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8634550 | Architecture and instruction set for implementing advanced encryption standard (AES) | Wajdi K. Feghali, Vinodh Gopal | 2014-01-21 |
| 8600049 | Method and apparatus for optimizing advanced encryption standard (AES) encryption and decryption in parallel modes of operation | Amit Gradstein, Zeev Sperber | 2013-12-03 |
| 8538015 | Flexible architecture and instruction for advanced encryption standard (AES) | Wajdi K. Feghali, Vinodh Gopal, Makaram Raghunandan, Martin G. Dixon, Srinivas Chennupaty +1 more | 2013-09-17 |
| 8538012 | Performing AES encryption or decryption in multiple modes with a single instruction | Martin G. Dixon, Srinivas Chennupaty | 2013-09-17 |
| 8516201 | Protecting private data from cache attacks | Shlomo Raikin, Gad Sheaffer | 2013-08-20 |
| 8489660 | Digital random number generator using partially entropic data | Howard C. Herbert, George W. Cox, Jesse Walker, Charles E. Dike, Stephen A. Fischer +7 more | 2013-07-16 |
| 8468365 | Tweakable encryption mode for memory encryption with protection against replay attacks | Gideon Gerzon, Ittai Anati, Jacob Doweck, Moshe Maor | 2013-06-18 |
| 8464125 | Instruction-set architecture for programmable cyclic redundancy check (CRC) computations | Vinodh Gopal, Gilbert M. Wolrich, Wajdi K. Feghali, Kirk S. Yap, Bradley A. Burres | 2013-06-11 |
| 8442217 | Method of implementing one way hash functions and apparatus therefor | Michael E. Kounavis | 2013-05-14 |
| 8407425 | Obscuring memory access patterns in conjunction with deadlock detection or avoidance | Gad Sheaffer, Shlomo Raikin | 2013-03-26 |
| 8364975 | Methods and apparatus for protecting data | Mohan J. Kumar | 2013-01-29 |
| 8341356 | Protected cache architecture and secure programming paradigm to protect applications | Shlomo Raikin, Gad Sheaffer | 2012-12-25 |
| 8340280 | Using a single instruction multiple data (SIMD) instruction to speed up galois counter mode (GCM) computations | Michael E. Kounavis | 2012-12-25 |
| 8219797 | Method and system to facilitate configuration of a hardware device in a platform | Kumar Chinnaswamy, Ittai Anati, Alberto J. Martinez | 2012-07-10 |
| 8214414 | Combined set bit count and detector logic | Rajaraman Ramanarayanan, Sanu K. Mathew, Ram Krishnamurthy, Vasantha K. Erraguntla | 2012-07-03 |
| 8209542 | Methods and apparatus for authenticating components of processing systems | Mohan J. Kumar | 2012-06-26 |
| 8209689 | Live lock free priority scheme for memory transactions in transactional memory | Shlomo Raikin, Gad Sheaffer | 2012-06-26 |
| 8194854 | Method and apparatus for optimizing advanced encryption standard (AES) encryption and decryption in parallel modes of operation | Amit Gradstein, Zeev Sperber | 2012-06-05 |
| 8150031 | Method and apparatus to perform redundant array of independent disks (RAID) operations | — | 2012-04-03 |
| 8144864 | Method for speeding up the computations for characteristic 2 elliptic curve cryptographic systems | Michael E. Kounavis | 2012-03-27 |
| 8127363 | Method and apparatus for booting a processing system | Konstantin Levit-Gurevich, Boaz Ouriel, Israel Hirsh | 2012-02-28 |
| 8068614 | Methods and apparatus for batch bound authentication | Mohan J. Kumar | 2011-11-29 |
| 8042025 | Determining a message residue | Vinodh Gopal, Gilbert M. Wolrich, Wajdi K. Feghali, Erdinc Ozturk | 2011-10-18 |
| 8010587 | Random number generator | Mohan J. Kumar | 2011-08-30 |
| 7991152 | Speeding up Galois Counter Mode (GCM) computations | Michael E. Kounavis | 2011-08-02 |