RB

Ruth A. Brain

IN Intel: 37 patents #961 of 30,777Top 4%
Caltech: 2 patents #1,302 of 4,321Top 35%
📍 Portland, OR: #473 of 9,213 inventorsTop 6%
🗺 Oregon: #968 of 28,073 inventorsTop 4%
Overall (All Time): #81,340 of 4,157,543Top 2%
39
Patents All Time

Issued Patents All Time

Showing 26–39 of 39 patents

Patent #TitleCo-InventorsDate
9502281 AVD hardmask for damascene patterning Kevin J. Fischer, Michael A. Childs 2016-11-22
9343524 Etchstop layers and capacitors 2016-05-17
9054068 Etchstop layers and capacitors 2015-06-09
8933564 Landing structure for through-silicon via Christopher M. Pelto, Kevin J. Lee, Gerald S. Leatherman 2015-01-13
8143159 Fabrication of interconnects in a low-k interlayer dielectrics Sean King 2012-03-27
8058177 Winged vias to increase overlay margin Martin Weiss, Bob Bigwood, Shannon Daviess 2011-11-15
7812455 Interconnect in low-k interlayer dielectrics Sean King 2010-10-12
7008872 Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures Valery M. Dubin, Chin-Chang Cheng, Makarem A. Hussein, Phi L. Nguyen 2006-03-07
6958547 Interconnect structures containing conductive electrolessly deposited etch stop layers, liner layers, and via plugs Valery M. Dubin, Chin-Chang Cheng, Makarem A. Hussein, Phi L. Nguyen 2005-10-25
6774037 Method integrating polymeric interlayer dielectric in integrated circuits Makarem A. Hussein, Robert Turklot, Sam Sivakumar 2004-08-10
6365514 Two chamber metal reflow process Jick Yu 2002-04-02
6048445 Method of forming a metal line utilizing electroplating 2000-04-11
5851319 Method and apparatus for selectively annealing heterostructures using microwaves Harry A. Atwater, Martin B. Barmatz 1998-12-22
5707466 Method and apparatus for selectively annealing heterostructures using microwave Harry A. Atwater, Martin B. Barmatz 1998-01-13