Issued Patents All Time
Showing 351–369 of 369 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7213136 | Apparatus and method for redundant zero micro-operation removal | Zeev Sperber | 2007-05-01 |
| 7206921 | Micro-operation un-lamination | Zeev Sperber, Simcha Gochman | 2007-04-17 |
| 7174444 | Preventing a read of a next sequential chunk in branch prediction of a subject chunk | Eran Altshuler, Oded Lempel, Nicolas Kacevas | 2007-02-06 |
| 7162614 | Elimination of potential renaming stalls due to use of partial registers | Zeev Sperber, Yuval Bustan, Rafi Marom | 2007-01-09 |
| 6920546 | Fusion of processor micro-operations | Simcha Gochman, Ittai Anati, Zeev Sperber | 2005-07-19 |
| 6725362 | Method for encoding an instruction set with a load with conditional fault instruction | Opher Kahn | 2004-04-20 |
| 6678816 | Method for optimized representation of page table entries | Ronny Ronen, Andrew F. Glew, Maury J. Bach, Richard Uhlig, Opher Kahn | 2004-01-13 |
| 6646647 | Display of images from tiled memory | Roman Surgutchik, Gad S Shaeffer, Oded Lempel | 2003-11-11 |
| 6647482 | Method for optimized representation of page table entries | Ronny Ronen, Andrew F. Glew, Maury J. Bach, Richard Uhlig, Opher Kahn | 2003-11-11 |
| 6105124 | Method and apparatus for merging binary translated basic blocks of instructions | Yaron Farber, Gad Sheaffer | 2000-08-15 |
| 6076144 | Method and apparatus for identifying potential entry points into trace segments | Guy Peled, Oded Lempel | 2000-06-13 |
| 6073213 | Method and apparatus for caching trace segments with multiple entry points | Guy Peled, Oded Lempel | 2000-06-06 |
| 5987595 | Method and apparatus for predicting when load instructions can be executed out-of order | Adi Yoaz, Ronny Ronen | 1999-11-16 |
| 5838941 | Out-of-order superscalar microprocessor with a renaming device that maps instructions from memory to registers | Gad Sheaffer, Ronny Ronen, Ilan Spillinger, Adi Yoaz | 1998-11-17 |
| 5778408 | Cache addressing mechanism that adapts multi-dimensional addressing topology | — | 1998-07-07 |
| 5719800 | Performance throttling to reduce IC power consumption | Millind Mittal | 1998-02-17 |
| 5710902 | Instruction dependency chain indentifier | Gad Sheaffer | 1998-01-20 |
| 5671383 | Register renaming in a superscalar microprocessor utilizing local and global renamer devices | — | 1997-09-23 |
| 4858464 | Portable pipe testing apparatus | James J. Miller | 1989-08-22 |