Issued Patents All Time
Showing 26–45 of 45 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10496563 | Apparatus and method for dynamic provisioning, quality of service, and scheduling in a graphics processor | Balaji Vembu, Altug Koker, Joydeep Ray, Abhishek R. Appu, Pattabhiraman K | 2019-12-03 |
| 10380039 | Apparatus and method for memory management in a graphics processing environment | Satyeshwar Singh, Sameer Kp, Ankur N. Shah, Kun Tian, Abhishek R. Appu +7 more | 2019-08-13 |
| 10372621 | Mechanism to support variable size page translations | Altug Koker, Nicolas Kacevas, Parth Damani, David I. Standring | 2019-08-06 |
| 10303594 | Guaranteed forward progress mechanism | Altug Koker, Joydeep Ray, Abhishek R. Appu | 2019-05-28 |
| 10249017 | Apparatus and method for shared resource partitioning through credit management | Nicolas Kacevas, Madhura Joshi, Satyanarayana Nekkalapu | 2019-04-02 |
| 9582432 | Instruction and logic for support of code modification in translation lookaside buffers | Jaroslaw Topp, Fernando Latorre | 2017-02-28 |
| 9507725 | Store forwarding for data caches | Steffen Kosinski, Fernando Latorre, Stanislav Shwartsman, Ethan Kalifon, Varun K. Mohandru +4 more | 2016-11-29 |
| 9367477 | Instruction and logic for support of code modification in translation lookaside buffers | Jaroslaw Topp, Fernando Latorre | 2016-06-14 |
| 9311239 | Power efficient level one data cache access with pre-validated tags | Steffen Kosinski, Rami May, Doron Gershon, Jaroslaw Topp, Varun K. Mohandru | 2016-04-12 |
| 9292449 | Cache memory data compression and decompression | Alaa R. Alameldeen, Jayesh Gaur, Steven D. Pudar, Manuel A. Aguilar Arreola, Margareth E. Marrugo +1 more | 2016-03-22 |
| 9268697 | Snoop filter having centralized translation circuitry and shadow tag array | Ilan Pardo, Stanislav Shwartsman, Shlomo Raikin | 2016-02-23 |
| 9009413 | Method and apparatus to implement lazy flush in a virtually tagged cache memory | Varun K. Mohandru, Fernando Latorre, Pedro Lopez, Naveen Neelakantam, Li-Gao Zei +3 more | 2015-04-14 |
| 8819455 | Parallelized counter tree walk for low overhead memory replay protection | Siddhartha Chhabra, Uday Savagaonkar, David M. Durham, Men Long, Carlos V. Rozas +1 more | 2014-08-26 |
| 7124277 | Method and apparatus for a trace cache trace-end predictor | Subramaniam Maiyuran, Peter J. Smith, Asim Nisar | 2006-10-17 |
| 6643745 | Method and apparatus for prefetching data into cache | Salvador Palanca, Angad Narang, Vladimir Pentkovski, Steve Tsai, Subramaniam Maiyuran +5 more | 2003-11-04 |
| 6584547 | Shared cache structure for temporal and non-temporal instructions | Salvador Palanca, Angad Narang, Vladimir Pentkovski, Steve Tsai | 2003-06-24 |
| 6526499 | Method and apparatus for load buffers | Salvador Palanca, Shekoufeh Qawami, Angad Narang, Subramaniam Maiyuran | 2003-02-25 |
| 6216215 | Method and apparatus for senior loads | Salvador Palanca, Shekoufeh Qawami, Angad Narang, Subramaniam Maiyuran | 2001-04-10 |
| 6202129 | Shared cache structure for temporal and non-temporal information using indicative bits | Salvador Palanca, Angad Narang, Vladimir Pentkovski, Steve Tsai | 2001-03-13 |
| 6122715 | Method and system for optimizing write combining performance in a shared buffer structure | Salvador Palanca, Vladimir Pentkovski, Subramaniam Maiyuran, Angad Narang | 2000-09-19 |