MD

Mark L. Doczy

IN Intel: 203 patents #53 of 30,777Top 1%
PS Planar Systems: 1 patents #37 of 88Top 45%
TR Tahoe Research: 1 patents #81 of 215Top 40%
📍 Portland, OR: #26 of 9,213 inventorsTop 1%
🗺 Oregon: #51 of 28,073 inventorsTop 1%
Overall (All Time): #3,156 of 4,157,543Top 1%
206
Patents All Time

Issued Patents All Time

Showing 201–206 of 206 patents

Patent #TitleCo-InventorsDate
6709911 Method for making a semiconductor device having a high-k gate dielectric Justin K. Brask, John Barnak 2004-03-23
6696327 Method for making a semiconductor device having a high-k gate dielectric Justin K. Brask, John Barnak, Robert S. Chau 2004-02-24
6696345 Metal-gate electrode for CMOS transistor applications Robert S. Chau, Brian S. Doyle, Jack T. Kavalieros 2004-02-24
6664173 Hardmask gate patterning technique for all transistors using spacer gate approach for critical dimension control Brian S. Doyle, Pat Stokley 2003-12-16
6620713 Interfacial layer for gate electrode and high-k dielectric layer and methods of fabrication Reza Arghavani, Robert S. Chau, Brian Roberds 2003-09-16
6617209 Method for making a semiconductor device having a high-k gate dielectric Robert S. Chau, Reza Arghavani 2003-09-09