Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11696409 | Vertical embedded component in a printed circuit board blind hole | Tin Poay Chuah, Min Suet Lim, Mooi Ling Chang, Chin Lee Kuan | 2023-07-04 |
| 11264315 | Electronic package with passive component between substrates | Eng Huat Goh, Min Suet Lim, Jiun Hann Sir, Jimmy Huang | 2022-03-01 |
| 10861839 | Dynamic random access memory (DRAM) mounts | Eng Huat Goh | 2020-12-08 |
| 10785872 | Package jumper interconnect | Eng Huat Goh | 2020-09-22 |
| 10492299 | Electronic assembly that includes a substrate bridge | Eng Huat Goh, Jia Yan Go, Jenny Shio Yin Ong | 2019-11-26 |
| 10411001 | Dynamic random access memory (DRAM) mounts | Eng Huat Goh | 2019-09-10 |
| 10163777 | Interconnects for semiconductor packages | Seok Ling Lim, Eng Huat Goh, Jenny Shio Yin Ong, Jia Yan Go, Jiun Hann Sir +1 more | 2018-12-25 |
| 9972589 | Integrated circuit package substrate with microstrip architecture and electrically grounded surface conductive layer | Eng Huat Goh, Min Suet Lim, Jiun Hann Sir, Seok Ling Lim | 2018-05-15 |
| 9960224 | Three capacitor stack and associated methods | Eng Huat Goh, Jiun Hann Sir, Han Kung Chua, Min Suet Lim | 2018-05-01 |
| 9907170 | FPC connector for better signal integrity and design compaction | Eng Huat Goh | 2018-02-27 |
| 9613920 | Microelectronic package utilizing multiple bumpless build-up structures and through-silicon vias | Eng Huat Goh | 2017-04-04 |
| 9257368 | Microelectric package utilizing multiple bumpless build-up structures and through-silicon vias | Eng Huat Goh | 2016-02-09 |