Issued Patents All Time
Showing 126–150 of 155 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5588126 | Methods and apparatus for fordwarding buffered store data on an out-of-order execution computer system | Jeffrey M. Abramson, Haitham Akkary, Andrew F. Glew, Kris G. Konigsfeld, Paul D. Madland +1 more | 1996-12-24 |
| 5586278 | Method and apparatus for state recovery following branch misprediction in an out-of-order microprocessor | David B. Papworth | 1996-12-17 |
| 5584038 | Entry allocation in a circular buffer using wrap bits indicating whether a queue of the circular buffer has been traversed | David B. Papworth, Andrew F. Glew, Michael A. Fetterman, Robert P. Colwell, Steven J. Griffith +2 more | 1996-12-10 |
| 5584001 | Branch target buffer for dynamically predicting branch instruction outcomes using a predicted branch history | Bradley D. Hoyt, Andrew F. Glew, Subramanian Natarajan | 1996-12-10 |
| 5584037 | Entry allocation in a circular buffer | David B. Papworth, Andrew F. Glew, Michael A. Fetterman, Robert P. Colwell, Steven J. Griffith +2 more | 1996-12-10 |
| 5577200 | Method and apparatus for loading and storing misaligned data on an out-of-order execution computer system | Jeffrey M. Abramson, Haitham Akkary, Andrew F. Glew, Kris G. Konigsfeld, Paul D. Madland | 1996-11-19 |
| 5574871 | Method and apparatus for implementing a set-associative branch target buffer | Bradley D. Hoyt, David B. Papworth, Ashwani K. Gupta, Michael A. Fetterman, Subramanian Natarajan +2 more | 1996-11-12 |
| 5574942 | Hybrid execution unit for complex microprocessor | Robert P. Colwell, David B. Papworth, Michael A. Fetterman, Andrew F. Glew, Stephen M. Coward +1 more | 1996-11-12 |
| 5564056 | Method and apparatus for zero extension and bit shifting to preserve register parameters in a microprocessor utilizing register renaming | Michael A. Fetterman, Andrew F. Glew, David B. Papworth, Robert P. Colwell | 1996-10-08 |
| 5564111 | Method and apparatus for implementing a non-blocking translation lookaside buffer | Andrew F. Glew, Haitham Akkary, Robert P. Colwell, David B. Papworth, Michael A. Fetterman | 1996-10-08 |
| 5561814 | Methods and apparatus for determining memory operating characteristics for given memory locations via assigned address ranges | Andrew F. Glew, David B. Papworth, Michael A. Fetterman, Robert P. Colwell, Frederick J. Pollack | 1996-10-01 |
| 5555432 | Circuit and method for scheduling instructions by predicting future availability of resources required for execution | Robert W. Martell, Michael A. Fetterman, David B. Papworth, James L. Schwartz | 1996-09-10 |
| 5553256 | Apparatus for pipeline streamlining where resources are immediate or certainly retired | Michael A. Fetterman, Robert W. Martell, David B. Papworth | 1996-09-03 |
| 5546597 | Ready selection of data dependent instructions using multi-cycle cams in a processor performing out-of-order instruction execution | Robert W. Martell, Michael A. Fetterman, David B. Papworth, Robert P. Colwell, Andrew F. Glew | 1996-08-13 |
| 5526510 | Method and apparatus for implementing a single clock cycle line replacement in a data cache unit | Haitham Akkary, Mandar Joshi, Rob MURRAY, Brent E. Lince, Paul D. Madland +1 more | 1996-06-11 |
| 5519864 | Method and apparatus for scheduling the dispatch of instructions from a reservation station | Robert W. Martell | 1996-05-21 |
| 5500948 | Translating instruction pointer virtual addresses to physical addresses for accessing an instruction cache | Robert M. Riches, Jr. | 1996-03-19 |
| 5490280 | Apparatus and method for entry allocation for a resource buffer | Shantanu Gupta, James S. Griffith | 1996-02-06 |
| 5471633 | Idiom recognizer within a register alias table | Robert P. Colwell, Andrew F. Glew, David B. Papworth, David W. Clift | 1995-11-28 |
| 5452426 | Coordinating speculative and committed state register source data and immediate source data in a processor | David B. Papworth, Michael A. Fetterman, Robert P. Colwell, Andrew F. Glew | 1995-09-19 |
| 5448707 | Mechanism to protect data saved on a local register cache during inter-subsystem calls and returns | Gyanendra Tiwary | 1995-09-05 |
| 5434987 | Method and apparatus for preventing incorrect fetching of an instruction of a self-modifying code sequence with dependency on a bufered store | Jeffrey M. Abramson, Haitham Akkary, Andrew F. Glew, Kris G. Konigsfeld, Paul D. Madland | 1995-07-18 |
| 5428811 | Interface between a register file which arbitrates between a number of single cycle and multiple cycle functional units | Frank S. Smith, Randy Steck | 1995-06-27 |
| 5423014 | Instruction fetch unit with early instruction fetch mechanism | Robert M. Riches, Jr. | 1995-06-06 |
| 5420991 | Apparatus and method for maintaining processing consistency in a computer system having multiple processors | Kris G. Konigsfeld, Jeffrey M. Abramson, Haitham Akkary, Andrew F. Glew | 1995-05-30 |