D. Michael Bell — 23 Patents at Intel

D. Michael Bell has been granted 23 US patents while listed as an inventor at Intel. The first was granted in 1995 and the most recent in May 2009. D. Michael Bell ranks #178,160 of 4,157,543 US inventors in our database (top 4.3%). Patent records list D. Michael Bell in Beaverton, OR, US.

Issued Patents All Time

Showing 1–23 of 23 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7535918	Copy on access mechanisms for low latency data movement	Anil Vasudevan, Sujoy Sen, Parthasarathy Sarangam	2009-05-19	$16,372,000
7480747	Method and apparatus to reduce latency and improve throughput of input/output data in a processor	Anil Vasudevan	2009-01-20	$15,289,000
7107371	Method and apparatus for providing and embedding control information in a bus system	—	2006-09-12	$13,412,000
7016989	Fast 16 bit, split transaction I/O bus	—	2006-03-21	$17,683,000
6330630	Computer system having improved data transfer across a bus bridge	—	2001-12-11	$125,527,000
6317799	Destination controlled remote DMA engine	William T. Futral	2001-11-13	$122,229,000
6266778	Split transaction I/O bus with pre-specified timing protocols to synchronously transmit packets between devices over multiple cycles	—	2001-07-24	$166,417,000
6148356	Scalable computer system	David W. Archer, Doug Moran, Steve Pawlowski	2000-11-14	$197,588,000
6134622	Dual mode bus bridge for computer system	Suvansh Krishan Kapur, Kevin Koschoreck, Srinand Venkatesan	2000-10-17	$234,968,000
6108736	System and method of flow control for a high speed bus	—	2000-08-22	$235,703,000
6088370	Fast 16 bit, split transaction I/O bus	—	2000-07-11	$279,406,000
6081851	Method and apparatus for programming a remote DMA engine residing on a first bus from a destination residing on a second bus	William T. Futral	2000-06-27	$298,468,000
6070207	Hot plug connected I/O bus for computer system	—	2000-05-30	$225,862,000
6047120	Dual mode bus bridge for interfacing a host bus and a personal computer interface bus	—	2000-04-04	$215,158,000
6021451	Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge	Mark A. Gonzales, Susan S. Meredith	2000-02-01	$155,838,000
5905876	Queue ordering for memory and I/O transactions in a multiple concurrent transaction computer system	Stephen S. Pawlowski, Peter D. MacWilliams	1999-05-18	$162,962,000
5835739	Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge	Mark A. Gonzales, Susan S. Meredith	1998-11-10	$74,050,000
5828865	Dual mode bus bridge for interfacing a host bus and a personal computer interface bus	—	1998-10-27	$71,819,000
5594882	PCI split transactions utilizing dual address cycle	—	1997-01-14	$145,282,000
5546546	Method and apparatus for maintaining transaction ordering and arbitrating in a bus bridge	Mark A. Gonzales, Susan S. Meredith	1996-08-13	$28,432,000
5535340	Method and apparatus for maintaining transaction ordering and supporting deferred replies in a bus bridge	Mark A. Gonzales, Susan S. Meredith	1996-07-09	$32,989,000
5434996	Synchronous/asynchronous clock net with autosense	—	1995-07-18	$34,486,000
5410707	Bootstrap loading from external memory including disabling a reset from a keyboard controller while an operating system load signal is active	—	1995-04-25	$26,296,000

D. Michael Bell — 23 Patents

Issued Patents All Time

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