Issued Patents All Time
Showing 76–100 of 112 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9459874 | Instruction set architecture-based inter-sequencer communications with a heterogeneous resource | Hong Wang, John Shen, Hong Jiang, Richard Hankins, Per Hammarlund +8 more | 2016-10-04 |
| 9436847 | Cryptographic pointer address encoding | David M. Durham | 2016-09-06 |
| 9417880 | Instruction for performing an overload check | Martin G. Dixon, Rajeev Gopalakrishna | 2016-08-16 |
| 9383997 | Apparatus, system, and method for persistent user-level thread | Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, Bryant Bigbee +6 more | 2016-07-05 |
| 9323533 | Supervisor mode execution protection | Adriaan Van De Ven, Asit K. Mallick, Gilbert Neiger, James S. Coke, Martin G. Dixon +1 more | 2016-04-26 |
| 9298911 | Method, apparatus, system, and computer readable medium for providing apparatus security | Gal Chanoch, Eran Birk, Steven Grobman, Tobias M. Kohlenberg, Rajeev Gopalakrisha | 2016-03-29 |
| 9239801 | Systems and methods for preventing unauthorized stack pivoting | Xiaoning Li, H P. ANVIN, Asit K. Mallick, Gilbert Neiger, James B. Crossland +5 more | 2016-01-19 |
| 9207940 | Robust and high performance instructions for system call | James B. Crossland, Atul Khare, Toby Opferman | 2015-12-08 |
| 9183391 | Managing device driver cross ring accesses | Adriaan Van De Ven | 2015-11-10 |
| 9069605 | Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention | Richard Hankins, Hong Wang, Gautham Chinya, Trung Diep, Shivnandan Kaushik +7 more | 2015-06-30 |
| 8938606 | System, apparatus, and method for segment register read and write regardless of privilege level | Gilbert Neiger, Martin G. Dixon, James S. Coke, James B. Crossland | 2015-01-20 |
| 8914618 | Instruction set architecture-based inter-sequencer communications with a heterogeneous resource | Hong Wang, John Shen, Hong Jiang, Richard Hankins, Per Hammarlund +8 more | 2014-12-16 |
| 8887174 | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | Richard Hankins, Gautham Chinya, Hong Wang, Shivnandan Kaushik, Bryant Bigbee +7 more | 2014-11-11 |
| 8719819 | Mechanism for instruction set based thread execution on a plurality of instruction sequencers | Hong Wang, John Shen, Ed Grochowski, James P. Held, Bryant Bigbee +9 more | 2014-05-06 |
| 8689215 | Structured exception handling for application-managed thread units | Richard Hankins, Gautham Chinya, Hong Wang, David K. Poulsen, Shirish Aundhe +1 more | 2014-04-01 |
| 8677163 | Context state management for processor feature sets | Don A. Van Dyke, Michael Mishaeli, Ittai Anati, Will Deutsch, Rajesh R. Sha +7 more | 2014-03-18 |
| 8635415 | Managing and implementing metadata in central processing unit using register extensions | Rajeev Gopalakrishna, Andrew F. Glew, Robert J. Kushlis, Don A. Van Dyke, Joseph F. Cihula +7 more | 2014-01-21 |
| 8631261 | Context state management for processor feature sets | Don A. Van Dyke, Michael Mishaeli, Ittai Anati, Will Deutsch, Rajesh Shah +7 more | 2014-01-14 |
| 8607235 | Mechanism to schedule threads on OS-sequestered sequencers without operating system intervention | Richard Hankins, Hong Wang, Gautham Chinya, Trung Diep, Shivnandan Kaushik +7 more | 2013-12-10 |
| 8516483 | Transparent support for operating system services for a sequestered sequencer | Gautham Chinya, Hong Wang, Richard Hankins, Shivnandan Kaushik, Bryant Bigbee +3 more | 2013-08-20 |
| 8479217 | Apparatus, system, and method for persistent user-level thread | Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, Bryant Bigbee +6 more | 2013-07-02 |
| 8079035 | Data structure and management techniques for local user-level thread data | Richard Hankins, Gautham Chinya, Hong Wang, David K. Poulsen, Shirish Aundhe +2 more | 2011-12-13 |
| 8078801 | Obscuring memory access patterns | Mark Buxton, Ernie Brickell, Quinn A. Jacobson, Hong Wang | 2011-12-13 |
| 8028295 | Apparatus, system, and method for persistent user-level thread | Gautham Chinya, Hong Wang, Prashant Sethi, Shivnandan Kaushik, Bryant Bigbee +6 more | 2011-09-27 |
| 8010969 | Mechanism for monitoring instruction set based thread execution on a plurality of instruction sequencers | Richard Hankins, Gautham Chinya, Hong Wang, Shivnandan Kaushik, Bryant Bigbee +7 more | 2011-08-30 |