Issued Patents All Time
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10236183 | Monolithic integration of semiconductor materials | Amey Mahadev Walke, Nadine Collaert | 2019-03-19 |
| 9633891 | Method for forming a transistor structure comprising a fin-shaped channel structure | Nadine Collaert, Geert Eneman, Naoto Horiguchi, Min Soo Kim, Anabela Veloso +1 more | 2017-04-25 |
| 9608094 | Heterosection tunnel field-effect transistor (TFET) | Anne S. Verhulst, Geoffrey Pourtois | 2017-03-28 |
| 9257539 | Method for manufacturing transistor and associated device | Nadine Collaert, Geert Eneman | 2016-02-09 |
| 9070720 | Tunnel field effect transistor device and method for making the device | Quentin Smets, Anne S. Verhulst, Marc Heyns | 2015-06-30 |
| 8576614 | Tunnel transistor, logical gate including the transistor, static random-access memory using the logical gate and method for making such a tunnel transistor | Marc Heyns, Cedric Huyghebaert, Anne S. Verhulst, Daniele Leonelli, Wim Dehaene | 2013-11-05 |
| 8415209 | Method of manufacturing a complementary nanowire tunnel field effect transistor semiconductor device | Daniele Leonelli, Anne Vandooren, Anne S. Verhulst, Roger Loo, Stefan De Gendt | 2013-04-09 |
| 8034689 | Method for fabricating a semiconductor device and the semiconductor device made thereof | Damien Lenoble | 2011-10-11 |
| 7799664 | Method for selective epitaxial growth of source/drain areas | Peter Verheyen, Denis Shamiryan | 2010-09-21 |
| 7737008 | Method for making quantum dots | Frederik Leys, Axel Nackaerts | 2010-06-15 |
| 7494902 | Method of fabricating a strained multi-gate transistor | Malgorzata Jurczak, Nadine Collaert | 2009-02-24 |
| 7157349 | Method of manufacturing a semiconductor device with field isolation regions consisting of grooves filled with isolation material | Jurriaan Schmitz, Claire Ravit | 2007-01-02 |
| 7033941 | Method of producing semiconductor devices using chemical mechanical polishing | — | 2006-04-25 |
| 6855605 | Semiconductor device with selectable gate thickness and method of manufacturing such devices | Malgorzata Jurczak, Emmanuel Augendre, Goncal Badenes | 2005-02-15 |
| 6607950 | MIS transistors with a metal gate and high-k dielectric and method of forming | Kirklen Henson, Serge Vanhaelemeersch, Goncal Badenes | 2003-08-19 |
| 6255227 | Etching process of CoSi2 layers | Ricardo A. Donaton, Karen Maex, Rita Verbeeck, Philippe Jansen, Ludo Deferm +1 more | 2001-07-03 |
| 6153484 | Etching process of CoSi.sub.2 layers | Ricardo A. Donaton, Karen Maex, Rita Verbeeck, Philippe Jansen, Ludo Deferm +1 more | 2000-11-28 |