| 12488516 |
Multi-output decoder for texture decompression |
Kenneth Rovers |
2025-12-02 |
|
| 12412233 |
Color state techniques for graphics processors |
Terence M. Potter, William V. Miller |
2025-09-09 |
|
| 12405786 |
Hardware support for conversion between integer and floating-point data |
Christopher A. Burns, Terence M. Potter |
2025-09-02 |
|
| 12405802 |
Methods and systems for inter-pipeline data hazard avoidance |
Luca Iuliano, Simon Nield, Ollie Mower |
2025-09-02 |
|
| 12367046 |
Scheduling tasks using swap flags |
Simon Nield, Adam de Grasse, Luca Iuliano |
2025-07-22 |
|
| 12353330 |
Preemption techniques for memory-backed registers |
Benjiman L. Goodman, Karl D. Mann, Terence M. Potter, Frank W. Liljeros, Jeffrey T. Brady |
2025-07-08 |
|
| 12265474 |
On-demand memory allocation |
Justin A. Hensley, Karl D. Mann, Terence M. Potter, Frank W. Liljeros, Ralph C. Taylor |
2025-04-01 |
|
| 12229593 |
Synchronizing scheduling tasks with atomic ALU |
Ollie Mower |
2025-02-18 |
|
| 12190151 |
Multi-stage thread scheduling |
Benjiman L. Goodman, Anjana Rajendran, Sheenam Jayaswal, Terence M. Potter |
2025-01-07 |
|
| 12182037 |
Cache control to preserve register data |
Jonathan Redshaw, Winnie W. Yeung, Benjiman L. Goodman, David K. Li, Zelin Zhang |
2024-12-31 |
$239,269,000 |
| 12159347 |
Method and system for multisample antialiasing |
Salil Sahasrabudhe, Andrew Davy |
2024-12-03 |
|
| 12112396 |
Task execution in a SIMD processing unit with parallel groups of processing lanes |
John W. Howson, Jonathan Redshaw |
2024-10-08 |
|
| 12020067 |
Scheduling tasks using targeted pipelines |
Simon Nield, Adam de Grasse, Luca Iuliano |
2024-06-25 |
|
| 11947462 |
Cache footprint management |
Terence M. Potter, Donald R. DeSota, Benjiman L. Goodman, Aroun Demeure, Cheng Li +1 more |
2024-04-02 |
$162,541,000 |
| 11947999 |
Multi-phased and multi-threaded program execution based on SIMD ratio |
— |
2024-04-02 |
|
| 11941742 |
Tiled processor communication fabric |
Adam Smith, Sergio V. Tota, Christopher G. Martin, Terence M. Potter, Max John Batley |
2024-03-26 |
$155,925,000 |
| 11900122 |
Methods and systems for inter-pipeline data hazard avoidance |
Luca Iuliano, Simon Nield, Ollie Mower |
2024-02-13 |
|
| 11868807 |
Scheduling tasks using work fullness counter |
Simon Nield, Adam de Grasse, Luca Iuliano |
2024-01-09 |
|
| 11836830 |
Multi-output decoder for texture decompression |
Kenneth Rovers |
2023-12-05 |
|
| 11829298 |
On-demand memory allocation |
Justin A. Hensley, Karl D. Mann, Terence M. Potter, Frank W. Liljeros, Ralph C. Taylor |
2023-11-28 |
$171,025,000 |
| 11734788 |
Task execution in a SIMD processing unit with parallel groups of processing lanes |
John W. Howson, Jonathan Redshaw |
2023-08-22 |
|
| 11720399 |
Task scheduling in a GPU using wakeup event state data |
Simon Nield, Adam de Grasse, Luca Iuliano, Ollie Mower |
2023-08-08 |
|
| 11698790 |
Queues for inter-pipeline data hazard avoidance |
Luca Iuliano, Simon Nield, Ollie Mower |
2023-07-11 |
|
| 11656908 |
Allocation of memory resources to SIMD workgroups |
Luca Iuliano, Simon Nield, Ollie Mower, Jonathan Redshaw |
2023-05-23 |
|
| 11568580 |
Multi-output decoder for texture decompression |
Kenneth Rovers |
2023-01-31 |
|
