SN

Simon Nield

IL Imagination Technologies Limited: 29 patents #21 of 280Top 8%
Overall (All Time): #127,986 of 4,157,543Top 4%
29
Patents All Time

Issued Patents All Time

Showing 25 most recent of 29 patents

Patent #TitleCo-InventorsDate
12405802 Methods and systems for inter-pipeline data hazard avoidance Luca Iuliano, Yoong Chert Foo, Ollie Mower 2025-09-02
12367046 Scheduling tasks using swap flags Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2025-07-22
12298924 Sorting memory address requests for parallel memory access using input address match masks Luca Iuliano, Thomas Rose 2025-05-13
12020067 Scheduling tasks using targeted pipelines Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2024-06-25
11900122 Methods and systems for inter-pipeline data hazard avoidance Luca Iuliano, Yoong Chert Foo, Ollie Mower 2024-02-13
11868807 Scheduling tasks using work fullness counter Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2024-01-09
11868775 Encoding and decoding variable length instructions James McCarthy 2024-01-09
11816044 Sorting memory address requests for parallel memory access using input address match masks Luca Iuliano, Thomas Rose 2023-11-14
11720399 Task scheduling in a GPU using wakeup event state data Adam de Grasse, Luca Iuliano, Ollie Mower, Yoong Chert Foo 2023-08-08
11698790 Queues for inter-pipeline data hazard avoidance Luca Iuliano, Yoong Chert Foo, Ollie Mower 2023-07-11
11656908 Allocation of memory resources to SIMD workgroups Luca Iuliano, Yoong Chert Foo, Ollie Mower, Jonathan Redshaw 2023-05-23
11531545 Scheduling tasks using swap flags Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2022-12-20
11429389 Data selection for a processor pipeline using multiple supply lines Thomas Rose 2022-08-30
11366691 Scheduling tasks using targeted pipelines Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2022-06-21
11347509 Encoding and decoding variable length instructions James McCarthy 2022-05-31
11249925 Sorting memory address requests for parallel memory access using input address match masks Luca Iuliano, Thomas Rose 2022-02-15
11204800 Task scheduling in a GPU using wakeup event state data Adam de Grasse, Luca Iuliano, Ollie Mower, Yoong Chert Foo 2021-12-21
11200064 Methods and systems for inter-pipeline data hazard avoidance Luca Iuliano, Yoong Chert Foo, Ollie Mower 2021-12-14
11188383 Scheduling tasks using work fullness counter Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2021-11-30
10990448 Allocation of memory resources to SIMD workgroups Luca Iuliano, Yoong Chert Foo, Ollie Mower, Jonathan Redshaw 2021-04-27
10884797 Scheduling tasks using targeted pipelines Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2021-01-05
10884743 Scheduling tasks using swap flags Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2021-01-05
10877760 Selection of data for processor pipelines using multiple supply lines wherein in one of two modes the same data is supplied to both inputs of a processing element Thomas Rose 2020-12-29
10817301 Methods and systems for inter-pipeline data hazard avoidance Luca Iuliano, Yoong Chert Foo, Ollie Mower 2020-10-27
10725821 Scheduling tasks using work fullness counter Yoong Chert Foo, Adam de Grasse, Luca Iuliano 2020-07-28