Issued Patents All Time
Showing 126–150 of 150 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9559191 | Punch through stopper in bulk finFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2017-01-31 |
| 9525048 | Symmetrical extension junction formation with low-k spacer and dual epitaxial process in finFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-12-20 |
| 9520363 | Forming CMOSFET structures with different contact liners | Kangguo Cheng, Tenko Yamashita | 2016-12-13 |
| 9508597 | 3D fin tunneling field effect transistor | Xin Sun, Tenko Yamashita | 2016-11-29 |
| 9502309 | Forming CMOSFET structures with different contact liners | Kangguo Cheng, Tenko Yamashita | 2016-11-22 |
| 9502523 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-11-22 |
| 9496225 | Recessed metal liner contact with copper fill | Praneet Adusumilli, Veeraraghavan S. Basker, Huiming Bu | 2016-11-15 |
| 9484431 | Pure boron for silicide contact | Chia-Yu Chen, Sanjay C. Mehta, Tenko Yamashita | 2016-11-01 |
| 9484256 | Pure boron for silicide contact | Chia-Yu Chen, Sanjay C. Mehta, Tenko Yamashita | 2016-11-01 |
| 9455317 | Nanowire semiconductor device including lateral-etch barrier region | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-09-27 |
| 9437445 | Dual fin integration for electron and hole mobility enhancement | Chia-Yu Chen, Miaomiao Wang, Tenko Yamashita | 2016-09-06 |
| 9437499 | Semiconductor device including merged-unmerged work function metal and variable fin pitch | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-09-06 |
| 9412641 | FinFET having controlled dielectric region height | Dechao Guo, Tenko Yamashita, Chun-Chen Yeh | 2016-08-09 |
| 9412643 | Shallow trench isolation for end fin variation control | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-08-09 |
| 9397197 | Forming wrap-around silicide contact on finFET | Dechao Guo, Hemanth Jagannathan, Shogo Mochizuki | 2016-07-19 |
| 9391152 | Implantation formed metal-insulator-semiconductor (MIS) contacts | Chia-Yu Chen, Tenko Yamashita, Chun-Chen Yeh | 2016-07-12 |
| 9362407 | Symmetrical extension junction formation with low-K spacer and dual epitaxial process in FinFET device | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-06-07 |
| 9331146 | Silicon nanowire formation in replacement metal gate process | Chia-Yu Chen, Tenko Yamashita | 2016-05-03 |
| 9318581 | Forming wrap-around silicide contact on finFET | Dechao Guo, Hemanth Jagannathan, Shogo Mochizuki | 2016-04-19 |
| 9257537 | Finfet including improved epitaxial topology | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-02-09 |
| 9252044 | Shallow trench isolation for end fin variation control | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-02-02 |
| 9252145 | Independent gate vertical FinFET structure | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2016-02-02 |
| 9196612 | Semiconductor device including merged-unmerged work function metal and variable fin pitch | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2015-11-24 |
| 9190466 | Independent gate vertical FinFET structure | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2015-11-17 |
| 9177810 | Dual silicide regions and method for forming the same | Veeraraghavan S. Basker, Tenko Yamashita, Chun-Chen Yeh | 2015-11-03 |