Issued Patents All Time
Showing 51–61 of 61 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8354309 | Method of providing threshold voltage adjustment through gate dielectric stack modification | Brian J. Greene, Michael P. Chudzik, Shu-Jen Han, William K. Henson, Yue Liang +3 more | 2013-01-15 |
| 8264886 | Delayed activation of selected wordlines in memory | Jin-Man Han | 2012-09-11 |
| 8259508 | Erase operation control sequencing apparatus, systems, and methods | Jin-Man Han, Aaron Yip | 2012-09-04 |
| 8174900 | Wordline voltage transfer apparatus, systems, and methods | Jin-Man Han | 2012-05-08 |
| 8106455 | Threshold voltage adjustment through gate dielectric stack modification | Brian J. Greene, Michael P. Chudzik, Shu-Jen Han, William K. Henson, Yue Liang +3 more | 2012-01-31 |
| 7999332 | Asymmetric semiconductor devices and method of fabricating | Jun Yuan, Dureseti Chidambarrao, Sunfei Fang, Yue Liang, Haizhou Yin | 2011-08-16 |
| 7834387 | Metal gate compatible flash memory gate stack | Roger A. Booth, Jr., Deok-kee Kim, Haining Yang | 2010-11-16 |
| 7825479 | Electrical antifuse having a multi-thickness dielectric layer | Roger A. Booth, Jr., Kangguo Cheng, Chandrasekharan Kothandaraman, Chengwen Pei, Ravi M. Todi | 2010-11-02 |
| 7778086 | Erase operation control sequencing apparatus, systems, and methods | Jin-Man Han, Aaron Yip | 2010-08-17 |
| 7656740 | Wordline voltage transfer apparatus, systems, and methods | Jin-Man Han | 2010-02-02 |
| 7649783 | Delayed activation of selected wordlines in memory | Jin-Man Han | 2010-01-19 |