Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 5895487 | Integrated processing and L2 DRAM cache | William T. Boyd, Thomas J. Heller, Jr., Michael Ignatowski, Richard E. Matick | 1999-04-20 |
| 5890215 | Electronic computer memory system having multiple width, high speed communication buffer | Richard E. Matick | 1999-03-30 |
| 5805494 | Trench capacitor structures | Badih El-Kareh, Richard L. Kleinhenz | 1998-09-08 |
| 5770969 | Controllable decoupling capacitor | Lloyd A. Walls, Byron L. Krauter | 1998-06-23 |
| 5542067 | Virtual multi-port RAM employing multiple accesses during single machine cycle | Barbara A. Chappell, Terry I. Chappell, Mahmut K. Ebcioglu | 1996-07-30 |
| 5506457 | Electronic switch for decoupling capacitor | Byron L. Krauter, Peter Juergen Klim, Tak H. Ning, Lloyd A. Walls | 1996-04-09 |
| 5471188 | Fast comparator circuit | Barbara A. Chappell, Terry I. Chappell, Bruce M. Fleischer | 1995-11-28 |
| 5434519 | Self-resetting CMOS off-chip driver | Thanh D. Trinh, Satyajit Dutta, Tai A. Cao, Thai Nguyen | 1995-07-18 |
| 5388072 | Bit line switch array for electronic computer memory | Richard E. Matick | 1995-02-07 |
| 5204841 | Virtual multi-port RAM | Barbara A. Chappell, Terry I. Chappell, Mahmut K. Ebcioglu | 1993-04-20 |
| 5089726 | Fast cycle time clocked amplifier | Barbara A. Chappell, Terry I. Chappell | 1992-02-18 |
| 5015881 | High speed decoding circuit with improved AND gate | Barbara A. Chappell, Terry I. Chappell | 1991-05-14 |
| 4998028 | High speed CMOS logic device for providing ECL compatible logic levels | Barbara A. Chappell, Terry I. Chappell | 1991-03-05 |
| 4845677 | Pipelined memory chip structure having improved cycle time | Barbara A. Chappell, Terry I. Chappell | 1989-07-04 |
| 4843261 | Complementary output, high-density CMOS decoder/driver circuit for semiconductor memories | Barbara A. Chappell, Terry I. Chappell | 1989-06-27 |
| 4835419 | Source-follower emitter-coupled-logic receiver circuit | Barbara A. Chappell, Terry I. Chappell | 1989-05-30 |
| 4833670 | Cross-point bit-switch for communication | Gerald Lebizay, Yeong-Chang Lien, Kioshi Maruyama | 1989-05-23 |
| 4763180 | Method and structure for a high density VMOS dynamic ram array | Wei Hwang, Lewis M. Terman | 1988-08-09 |
| 4719372 | Multiplying interface circuit for level shifting between FET and TTL levels | Barbara A. Chappell | 1988-01-12 |
| 4697108 | Complementary input circuit with nonlinear front end and partially coupled latch | Barbara A. Chappell | 1987-09-29 |
| 4645954 | ECL to FET interface circuit for field effect transistor arrays | — | 1987-02-24 |
| 4618784 | High-performance, high-density CMOS decoder/driver circuit | Barbara A. Chappell, Thekkemadathil V. Rajeevakumar, Lewis M. Terman | 1986-10-21 |
| 4599708 | Method and structure for machine data storage with simultaneous write and read | — | 1986-07-08 |
| 4491748 | High performance FET driver circuit | Barbara A. Chappell | 1985-01-01 |
| 4441039 | Input buffer circuit for semiconductor memory | — | 1984-04-03 |