RG

Robert M. Geffken

IBM: 39 patents #2,420 of 70,183Top 4%
TE Tel Epion: 4 patents #17 of 54Top 35%
📍 Burlington, VT: #13 of 475 inventorsTop 3%
🗺 Vermont: #155 of 4,968 inventorsTop 4%
Overall (All Time): #71,098 of 4,157,543Top 2%
43
Patents All Time

Issued Patents All Time

Showing 26–43 of 43 patents

Patent #TitleCo-InventorsDate
6300236 Copper stud structure with refractory metal liner James M. E. Harper 2001-10-09
6236103 Integrated high-performance decoupling capacitor and heat sink Kerry Bernstein, Wilbur D. Pricer, Anthony K. Stamper, Steven H. Voldman 2001-05-22
6180498 Alignment targets having enhanced contrast Robert K. Leidy 2001-01-30
6150723 Copper stud structure with refractory metal liner James M. E. Harper 2000-11-21
6093630 Semi-conductor personalization structure and method William T. Motsiff, Ronald R. Uttecht 2000-07-25
5985762 Method of forming a self-aligned copper diffusion barrier in vias Stephen E. Luce 1999-11-16
5898227 Alignment targets having enhanced contrast Robert K. Leidy 1999-04-27
5883435 Personalization structure for semiconductor devices William T. Motsiff, Ronald R. Uttecht 1999-03-16
5811870 Antifuse structure Arup Bhattacharyya, Chung H. Lam, Robert K. Leidy 1998-09-22
5795819 Integrated pad and fuse structure for planar copper metallurgy William T. Motsiff, Ronald R. Uttecht 1998-08-18
5731624 Integrated pad and fuse structure for planar copper metallurgy William T. Motsiff, Ronald R. Uttecht 1998-03-24
5719070 Metallization composite having nickel intermediate/interface Herbert C. Cook, Paul A. Farrar, William T. Motsiff, Adolf E. Wirsing 1998-02-17
5585674 Transverse diffusion barrier interconnect structure Matthew J. Rutten 1996-12-17
5488013 Method of forming transverse diffusion barrier interconnect structure Matthew J. Rutten 1996-01-30
5457345 Metallization composite having nickle intermediate/interface Herbert C. Cook, Paul A. Farrar, William T. Motsiff, Adolf E. Wirsing 1995-10-10
5339212 Sidewall decoupling capacitor Lawrence J. Dunlop 1994-08-16
5126006 Plural level chip masking John Cronin, Paul A. Farrar, William H. Guthrie, Carter W. Kaanta, Rosemary A. Previti-Kelly +3 more 1992-06-30
4423547 Method for forming dense multilevel interconnection metallurgy for semiconductor devices Paul A. Farrar, Charles T. Kroll 1984-01-03